| Message ID | 20220525071036.223396-4-herve.codina@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Microchip LAN966x USB device support | expand |
On 25.05.2022 10:10, Herve Codina wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add UDPHS (the USB High Speed Device Port controller) support. > > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS > IP. This IP is also the same as the one present in the SAMA5D3 > SOC. > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 7d2869648050..e086df741f99 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 { > status = "disabled"; > }; > > + udc: usb@e0808000 { > + compatible = "microchip,lan9662-udc", > + "atmel,sama5d3-udc"; > + reg = <0x00200000 0x80000>, > + <0xe0808000 0x400>; > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>; > + clock-names = "pclk", "hclk"; > + status = "disabled"; > + }; > + This doesn't apply clean on top of v5.19-rc1. Can you check and resend? > can0: can@e081c000 { > compatible = "bosch,m_can"; > reg = <0xe081c000 0xfc>, <0x00100000 0x4000>; > -- > 2.35.3 >
Hi Claudiu, On Thu, 30 Jun 2022 09:31:00 +0000 <Claudiu.Beznea@microchip.com> wrote: > On 25.05.2022 10:10, Herve Codina wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Add UDPHS (the USB High Speed Device Port controller) support. > > > > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS > > IP. This IP is also the same as the one present in the SAMA5D3 > > SOC. > > > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > --- > > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > > index 7d2869648050..e086df741f99 100644 > > --- a/arch/arm/boot/dts/lan966x.dtsi > > +++ b/arch/arm/boot/dts/lan966x.dtsi > > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 { > > status = "disabled"; > > }; > > > > + udc: usb@e0808000 { > > + compatible = "microchip,lan9662-udc", > > + "atmel,sama5d3-udc"; > > + reg = <0x00200000 0x80000>, > > + <0xe0808000 0x400>; > > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>; > > + clock-names = "pclk", "hclk"; > > + status = "disabled"; > > + }; > > + > > This doesn't apply clean on top of v5.19-rc1. Can you check and resend? Sure, I am going to send a rebased version of this series. Thanks, Hervé
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7d2869648050..e086df741f99 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 { status = "disabled"; }; + udc: usb@e0808000 { + compatible = "microchip,lan9662-udc", + "atmel,sama5d3-udc"; + reg = <0x00200000 0x80000>, + <0xe0808000 0x400>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + can0: can@e081c000 { compatible = "bosch,m_can"; reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
Add UDPHS (the USB High Speed Device Port controller) support. The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS IP. This IP is also the same as the one present in the SAMA5D3 SOC. Signed-off-by: Herve Codina <herve.codina@bootlin.com> --- arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)