| Message ID | 20220624043905.129207-1-j-choudhary@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] arm64: dts: ti: k3-am62-main: Enable crypto accelerator | expand |
Hi Jayesh Choudhary, On Fri, 24 Jun 2022 10:09:05 +0530, Jayesh Choudhary wrote: > Add the node for sa3ul crypto accelerator. > > I have applied the following to branch ti-k3-dts-next on [1]. Thank you! [1/1] arm64: dts: ti: k3-am62-main: Enable crypto accelerator commit: 8af893654c027fb679f67851aedb569ce7acb1e4 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index df3b9883e887..8bb9cb5d4c1a 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -165,6 +165,19 @@ }; }; + crypto: crypto@40900000 { + compatible = "ti,am62-sa3ul"; + reg = <0x00 0x40900000 0x00 0x1200>; + power-domains = <&k3_pds 70 TI_SCI_PD_SHARED>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>; + + dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>, + <&main_pktdma 0x7507 0>; + dma-names = "tx", "rx1", "rx2"; + }; + main_pmx0: pinctrl@f4000 { compatible = "pinctrl-single"; reg = <0x00 0xf4000 0x00 0x2ac>;
Add the node for sa3ul crypto accelerator. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> --- On local testing, crypto self-tests and tcrypt tests were passing for SHA256, SHA512, ECB-AES and CBC-AES algorithms. RNG node has not been added due to the indirect access of the hardware random number generator from OP-TEE. Changelog v1->v2: - Change the flag from TI_SCI_PD_EXCLUSIVE to TI_SCI_PD_SHARED since sa3ul hardware is also used by OP-TEE and so it should be requested using shared TI-SCI flag arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)