| Message ID | 20220704143554.1180927-2-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] dt-bindings: mmc: sdhci-msm: document resets | expand |
On 04/07/2022 16:35, Robert Marko wrote: > Add reset to SDHCI controller so it can be reset to avoid timeout issues > after software reset due to bootloader set configuration. > > Signed-off-by: Robert Marko <robimarko@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 4.07.2022 16:35, Robert Marko wrote: > Add reset to SDHCI controller so it can be reset to avoid timeout issues > after software reset due to bootloader set configuration. > > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad
On Mon, 4 Jul 2022 16:35:54 +0200, Robert Marko wrote: > Add reset to SDHCI controller so it can be reset to avoid timeout issues > after software reset due to bootloader set configuration. > > Applied, thanks! [2/2] arm64: dts: ipq8074: add reset to SDHCI commit: 730d55d861c63647df3cc9f77904a01c6719201b Best regards,
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index ddafc7de6c5f..d685ca1969a3 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 { <&gcc GCC_SDCC1_APPS_CLK>, <&xo>; clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC1_BCR>; max-frequency = <384000000>; mmc-ddr-1_8v; mmc-hs200-1_8v;
Add reset to SDHCI controller so it can be reset to avoid timeout issues after software reset due to bootloader set configuration. Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 + 1 file changed, 1 insertion(+)