Message ID | 20220626183247.142776-1-david@ixit.cz (mailing list archive) |
---|---|
State | Accepted |
Commit | 363c1b04cfce5615f2dc1b7f19e4456937ed2068 |
Headers | show |
Series | [v4,1/3] ARM: dts: qcom: extend scm compatible to match dt-schema | expand |
On Sun, 26 Jun 2022 20:32:45 +0200, David Heidelberg wrote: > First device specific compatible, then general one. > > Applied, thanks! [1/3] ARM: dts: qcom: extend scm compatible to match dt-schema commit: 363c1b04cfce5615f2dc1b7f19e4456937ed2068 Best regards,
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 9120d10dcd9e..67e625e56e04 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -309,7 +309,7 @@ dsps_smsm: dsps@4 { firmware { scm { - compatible = "qcom,scm-apq8064"; + compatible = "qcom,scm-apq8064", "qcom,scm"; clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>; clock-names = "core"; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index cb01faa23eb7..123c0c32d1df 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -95,7 +95,7 @@ memory { firmware { scm { - compatible = "qcom,scm"; + compatible = "qcom,scm-apq8084", "qcom,scm"; clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; clock-names = "core", "bus", "iface"; }; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index c5da723f7674..4faf854aab9c 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -156,7 +156,7 @@ xo: xo { firmware { scm { - compatible = "qcom,scm-ipq4019"; + compatible = "qcom,scm-ipq4019", "qcom,scm"; }; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 804d094c4d79..4cbd8d91f7d0 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -96,7 +96,7 @@ CPU_SPC: spc { firmware { scm { - compatible = "qcom,scm"; + compatible = "qcom,scm-msm8974", "qcom,scm"; clocks = <&gcc GCC_CE1_CLK>, <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>; clock-names = "core", "bus", "iface"; };