diff mbox series

[2/3] drm/komeda - At init write GCU control block to handle already on DPU

Message ID 20220606114714.175499-2-carsten.haitzler@foss.arm.com (mailing list archive)
State New, archived
Headers show
Series [1/3] drm/komeda - Add legacy FB support so VT's work as expected | expand

Commit Message

Carsten Haitzler June 6, 2022, 11:47 a.m. UTC 
From: Carsten Haitzler <carsten.haitzler@arm.com>

If something has already set up the DPU before the komeda driver comes
up, it will fail to init because it was just writing to the SRST bit in
the GCU control register and ignoring others. This resulted in TBU
bringup stalling and init failing. By writing completely we also  set the
mode back to 0 (inactive) too and thus TBU bringup works.

Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com>
---
 drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Liviu Dudau July 8, 2022, 4:07 p.m. UTC | #1 
On Mon, Jun 06, 2022 at 12:47:13PM +0100, carsten.haitzler@foss.arm.com wrote:
> From: Carsten Haitzler <carsten.haitzler@arm.com>
> 
> If something has already set up the DPU before the komeda driver comes
> up, it will fail to init because it was just writing to the SRST bit in
> the GCU control register and ignoring others. This resulted in TBU
> bringup stalling and init failing. By writing completely we also  set the
> mode back to 0 (inactive) too and thus TBU bringup works.

This is a rather large hammer, tbh. I would like to see if there is a better way of
handling the handover from EFIFB that this patch is trying to fix, but I lack an
usable plaform for that. It will generate a flicker at module load time, but if users
of Morello are happy with that, then

Acked-by: Liviu Dudau <liviu.dudau@arm.com>

Best regards,
Liviu

> 
> Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com>
> ---
>  drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> index 00fa56c29b3e..39618c1a4c81 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -309,8 +309,7 @@ static int d71_reset(struct d71_dev *d71)
>  	u32 __iomem *gcu = d71->gcu_addr;
>  	int ret;
>  
> -	malidp_write32_mask(gcu, BLK_CONTROL,
> -			    GCU_CONTROL_SRST, GCU_CONTROL_SRST);
> +	malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
>  
>  	ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
>  			   100, 1000, 10000);
> -- 
> 2.32.0
>
Carsten Haitzler July 8, 2022, 4:55 p.m. UTC | #2 
On 7/8/22 17:07, Liviu Dudau wrote:
> On Mon, Jun 06, 2022 at 12:47:13PM +0100, carsten.haitzler@foss.arm.com wrote:
>> From: Carsten Haitzler <carsten.haitzler@arm.com>
>>
>> If something has already set up the DPU before the komeda driver comes
>> up, it will fail to init because it was just writing to the SRST bit in
>> the GCU control register and ignoring others. This resulted in TBU
>> bringup stalling and init failing. By writing completely we also  set the
>> mode back to 0 (inactive) too and thus TBU bringup works.
> 
> This is a rather large hammer, tbh. I would like to see if there is a better way of
> handling the handover from EFIFB that this patch is trying to fix, but I lack an
> usable plaform for that. It will generate a flicker at module load time, but if users
> of Morello are happy with that, then

We're pretty happy with that setup right now. Certainly better than 
Komeda failing to init.

> Acked-by: Liviu Dudau <liviu.dudau@arm.com>
> 
> Best regards,
> Liviu
> 
>>
>> Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com>
>> ---
>>   drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 +--
>>   1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> index 00fa56c29b3e..39618c1a4c81 100644
>> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> @@ -309,8 +309,7 @@ static int d71_reset(struct d71_dev *d71)
>>   	u32 __iomem *gcu = d71->gcu_addr;
>>   	int ret;
>>   
>> -	malidp_write32_mask(gcu, BLK_CONTROL,
>> -			    GCU_CONTROL_SRST, GCU_CONTROL_SRST);
>> +	malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
>>   
>>   	ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
>>   			   100, 1000, 10000);
>> -- 
>> 2.32.0
>>
>
Carsten Haitzler July 15, 2022, 4 p.m. UTC | #3 
On 7/8/22 17:07, Liviu Dudau wrote:
> On Mon, Jun 06, 2022 at 12:47:13PM +0100, carsten.haitzler@foss.arm.com wrote:
>> From: Carsten Haitzler <carsten.haitzler@arm.com>
>>
>> If something has already set up the DPU before the komeda driver comes
>> up, it will fail to init because it was just writing to the SRST bit in
>> the GCU control register and ignoring others. This resulted in TBU
>> bringup stalling and init failing. By writing completely we also  set the
>> mode back to 0 (inactive) too and thus TBU bringup works.
> 
> This is a rather large hammer, tbh. I would like to see if there is a better way of
> handling the handover from EFIFB that this patch is trying to fix, but I lack an
> usable plaform for that. It will generate a flicker at module load time, but if users
> of Morello are happy with that, then

Just FYI - it'll flicker anyway as the PHY is external and gets 
re-initted etc. anyway... This also happens to handle the situation 
where something goes wrong and you have an already initted komeda sue to 
a previous module load (and it's still alive and working due to an 
unclean shutdown). It'll allow you to load the module again :) So it's 
multi-useful.

> Acked-by: Liviu Dudau <liviu.dudau@arm.com>
> 
> Best regards,
> Liviu
> 
>>
>> Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com>
>> ---
>>   drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 3 +--
>>   1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> index 00fa56c29b3e..39618c1a4c81 100644
>> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
>> @@ -309,8 +309,7 @@ static int d71_reset(struct d71_dev *d71)
>>   	u32 __iomem *gcu = d71->gcu_addr;
>>   	int ret;
>>   
>> -	malidp_write32_mask(gcu, BLK_CONTROL,
>> -			    GCU_CONTROL_SRST, GCU_CONTROL_SRST);
>> +	malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
>>   
>>   	ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
>>   			   100, 1000, 10000);
>> -- 
>> 2.32.0
>>
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 00fa56c29b3e..39618c1a4c81 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -309,8 +309,7 @@  static int d71_reset(struct d71_dev *d71)
 	u32 __iomem *gcu = d71->gcu_addr;
 	int ret;
 
-	malidp_write32_mask(gcu, BLK_CONTROL,
-			    GCU_CONTROL_SRST, GCU_CONTROL_SRST);
+	malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
 
 	ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
 			   100, 1000, 10000);