@@ -22,6 +22,7 @@ Supported boards:
* ROG STRIX X570-F GAMING
* ROG STRIX X570-I GAMING
* ROG STRIX Z690-A GAMING WIFI D4
+ * ROG ZENITH II EXTREME
Authors:
- Eugene Shalygin <eugene.shalygin@gmail.com>
@@ -56,6 +56,8 @@ static char *mutex_path_override;
#define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX"
+#define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0"
+
#define MAX_IDENTICAL_BOARD_VARIATIONS 3
/* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */
@@ -121,6 +123,18 @@ enum ec_sensors {
ec_sensor_temp_water_in,
/* "Water_Out" temperature sensor reading [℃] */
ec_sensor_temp_water_out,
+ /* "Water_Block_In" temperature sensor reading [℃] */
+ ec_sensor_temp_water_block_in,
+ /* "Water_Block_Out" temperature sensor reading [℃] */
+ ec_sensor_temp_water_block_out,
+ /* "T_sensor_2" temperature sensor reading [℃] */
+ ec_sensor_temp_t_sensor_2,
+ /* "Extra_1" temperature sensor reading [℃] */
+ ec_sensor_temp_sensor_extra_1,
+ /* "Extra_2" temperature sensor reading [℃] */
+ ec_sensor_temp_sensor_extra_2,
+ /* "Extra_3" temperature sensor reading [℃] */
+ ec_sensor_temp_sensor_extra_3,
};
#define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
@@ -136,6 +150,12 @@ enum ec_sensors {
#define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
#define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
#define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
+#define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in)
+#define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out)
+#define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2)
+#define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1)
+#define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2)
+#define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3)
enum board_family {
family_unknown,
@@ -199,6 +219,18 @@ static const struct ec_sensor_info sensors_family_amd_500[] = {
EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
[ec_sensor_temp_water_out] =
EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
+ [ec_sensor_temp_water_block_in] =
+ EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
+ [ec_sensor_temp_water_block_out] =
+ EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03),
+ [ec_sensor_temp_sensor_extra_1] =
+ EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09),
+ [ec_sensor_temp_t_sensor_2] =
+ EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a),
+ [ec_sensor_temp_sensor_extra_2] =
+ EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b),
+ [ec_sensor_temp_sensor_extra_3] =
+ EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c),
};
static const struct ec_sensor_info sensors_family_intel_300[] = {
@@ -231,6 +263,9 @@ static const struct ec_sensor_info sensors_family_intel_600[] = {
#define SENSOR_SET_TEMP_CHIPSET_CPU_MB \
(SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
#define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
+#define SENSOR_SET_WATER_BLOCK \
+ (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
+
struct ec_board_info {
const char *board_names[MAX_IDENTICAL_BOARD_VARIATIONS];
@@ -378,6 +413,18 @@ static const struct ec_board_info board_info[] = {
.mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
.family = family_intel_600_series,
},
+ {
+ .board_names = {"ROG ZENITH II EXTREME"},
+ .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
+ SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
+ SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
+ SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
+ SENSOR_SET_WATER_BLOCK |
+ SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
+ SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
+ .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
+ .family = family_amd_500_series,
+ },
{}
};