diff mbox series

[v2,2/2] s390x: intercept: make sure all output lines are unique

Message ID 20220721133002.142897-3-imbrenda@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series s390x: Pipeline and other minor fixes | expand

Commit Message

Claudio Imbrenda July 21, 2022, 1:30 p.m. UTC 
The intercept test has the same output line twice for two different
testcases.

Fix this by adding report_prefix_push() as appropriate.

Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
---
 s390x/intercept.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Thomas Huth July 21, 2022, 1:42 p.m. UTC | #1 
On 21/07/2022 15.30, Claudio Imbrenda wrote:
> The intercept test has the same output line twice for two different
> testcases.
> 
> Fix this by adding report_prefix_push() as appropriate.
> 
> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
> ---
>   s390x/intercept.c | 6 ++++++
>   1 file changed, 6 insertions(+)

Reviewed-by: Thomas Huth <thuth@redhat.com>
diff mbox series

Patch

diff --git a/s390x/intercept.c b/s390x/intercept.c
index 656b8adb..9e826b6c 100644
--- a/s390x/intercept.c
+++ b/s390x/intercept.c
@@ -68,14 +68,19 @@  static void test_spx(void)
 	set_prefix(old_prefix);
 	report(pagebuf[GEN_LC_STFL] != 0, "stfl to new prefix");
 
+	report_prefix_push("operand not word aligned");
 	expect_pgm_int();
 	asm volatile(" spx 0(%0) " : : "r"(1));
 	check_pgm_int_code(PGM_INT_CODE_SPECIFICATION);
+	report_prefix_pop();
 
+	report_prefix_push("operand outside memory");
 	expect_pgm_int();
 	asm volatile(" spx 0(%0) " : : "r"(-8L));
 	check_pgm_int_code(PGM_INT_CODE_ADDRESSING);
+	report_prefix_pop();
 
+	report_prefix_push("new prefix outside memory");
 	new_prefix = get_ram_size() & 0x7fffe000;
 	/* TODO: Remove host_is_tcg() checks once CIs are using QEMU >= 7.1 */
 	if (!host_is_tcg() && (get_ram_size() - new_prefix < 2 * PAGE_SIZE)) {
@@ -95,6 +100,7 @@  static void test_spx(void)
 		else
 			report_skip("inaccessible prefix area");
 	}
+	report_prefix_pop();
 }
 
 /* Test the STORE CPU ADDRESS instruction */