| Message ID | 20220723160513.271692-8-Mr.Bossman075@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add support for the i.MXRT1170-evk | expand |
Hi Jesse,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on abelvesa/clk/imx linus/master v5.19-rc8]
[cannot apply to soc/for-next next-20220726]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-randconfig-c002-20220726 (https://download.01.org/0day-ci/archive/20220727/202207270909.VypZ4wfI-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 9e88cbcc403bdf82f29259ad60ff60a8fc4434a1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/intel-lab-lkp/linux/commit/96413cc0300321ec18d27ca9983f349a41f99706
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
git checkout 96413cc0300321ec18d27ca9983f349a41f99706
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/imx/ drivers/firmware/efi/libstub/ drivers/pci/ drivers/soc/fsl/qe/ fs/ecryptfs/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/clk/imx/clk-imx6sl.c:16:
drivers/clk/imx/clk.h:268:60: error: too few arguments provided to function-like macro invocation
const char *parent_name, void __iomem *base, u32 div_mask);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
>> drivers/clk/imx/clk-imx6sl.c:217:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:218:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:219:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:220:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:221:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:222:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sl.c:223:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
8 errors generated.
--
In file included from drivers/clk/imx/clk-imx6sx.c:19:
drivers/clk/imx/clk.h:268:60: error: too few arguments provided to function-like macro invocation
const char *parent_name, void __iomem *base, u32 div_mask);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
>> drivers/clk/imx/clk-imx6sx.c:160:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:161:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:162:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:163:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:164:93: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:165:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6sx.c:166:92: error: too few arguments provided to function-like macro invocation
hws[IMX6SX_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
8 errors generated.
--
In file included from drivers/clk/imx/clk-imx6ul.c:18:
drivers/clk/imx/clk.h:268:60: error: too few arguments provided to function-like macro invocation
const char *parent_name, void __iomem *base, u32 div_mask);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
>> drivers/clk/imx/clk-imx6ul.c:149:90: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:150:92: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:151:89: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:152:89: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:153:89: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:154:90: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
drivers/clk/imx/clk-imx6ul.c:155:89: error: too few arguments provided to function-like macro invocation
hws[IMX6UL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
^
drivers/clk/imx/clk.h:107:9: note: macro 'imx_clk_hw_pllv3' defined here
#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
^
8 errors generated.
vim +217 drivers/clk/imx/clk-imx6sl.c
751f7e999afcef1 arch/arm/mach-imx/clk-imx6sl.c Anson Huang 2014-01-09 181
53bb71da1c5c142 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-21 182 static void __init imx6sl_clocks_init(struct device_node *ccm_node)
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 183 {
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 184 struct device_node *np;
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 185 void __iomem *base;
848db4a0a17aaf9 arch/arm/mach-imx/clk-imx6sl.c Anson Huang 2014-01-07 186 int ret;
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 187
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 188 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 189 IMX6SL_CLK_END), GFP_KERNEL);
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 190 if (WARN_ON(!clk_hw_data))
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 191 return;
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 192
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 193 clk_hw_data->num = IMX6SL_CLK_END;
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 194 hws = clk_hw_data->hws;
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 195
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 196 hws[IMX6SL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 197 hws[IMX6SL_CLK_CKIL] = imx_obtain_fixed_clock_hw("ckil", 0);
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 198 hws[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock_hw("osc", 0);
e90f41990dce355 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2014-09-01 199 /* Clock source from external clock via CLK1 PAD */
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 200 hws[IMX6SL_CLK_ANACLK1] = imx_obtain_fixed_clock_hw("anaclk1", 0);
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 201
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 202 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-anatop");
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 203 base = of_iomap(np, 0);
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 204 WARN_ON(!base);
8b1a3c0ba9b1cec drivers/clk/imx/clk-imx6sl.c Anson Huang 2020-02-12 205 of_node_put(np);
6e6cdf66563086c arch/arm/mach-imx/clk-imx6sl.c Anson Huang 2014-02-11 206 anatop_base = base;
45fe6810347b0a8 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2013-05-03 207
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 208 hws[IMX6SL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 209 hws[IMX6SL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 210 hws[IMX6SL_PLL3_BYPASS_SRC] = imx_clk_hw_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 211 hws[IMX6SL_PLL4_BYPASS_SRC] = imx_clk_hw_mux("pll4_bypass_src", base + 0x70, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 212 hws[IMX6SL_PLL5_BYPASS_SRC] = imx_clk_hw_mux("pll5_bypass_src", base + 0xa0, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 213 hws[IMX6SL_PLL6_BYPASS_SRC] = imx_clk_hw_mux("pll6_bypass_src", base + 0xe0, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 214 hws[IMX6SL_PLL7_BYPASS_SRC] = imx_clk_hw_mux("pll7_bypass_src", base + 0x20, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
e90f41990dce355 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2014-09-01 215
e90f41990dce355 arch/arm/mach-imx/clk-imx6sl.c Shawn Guo 2014-09-01 216 /* type name parent_name base div_mask */
3a1d8fe6f445b13 drivers/clk/imx/clk-imx6sl.c Abel Vesa 2019-05-29 @217 hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
Hi Jesse,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on abelvesa/clk/imx linus/master v5.19-rc8]
[cannot apply to soc/for-next next-20220726]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-randconfig-p001-20220727 (https://download.01.org/0day-ci/archive/20220727/202207272045.F8viHzgx-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/96413cc0300321ec18d27ca9983f349a41f99706
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
git checkout 96413cc0300321ec18d27ca9983f349a41f99706
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/imx/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/clk/imx/clk-imxrt1050.c:14:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imxrt1050.c: In function 'imxrt1050_clocks_probe':
>> drivers/clk/imx/clk-imxrt1050.c:74:57: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
74 | "pll1_arm_ref_sel", pll_base + 0x0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imxrt1050.c:76:57: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
76 | "pll2_sys_ref_sel", pll_base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imxrt1050.c:78:61: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
78 | "pll3_usb_otg_ref_sel", pll_base + 0x10, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imxrt1050.c:80:60: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
80 | "pll5_video_ref_sel", pll_base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
vim +/imx_clk_hw_pllv3 +74 drivers/clk/imx/clk-imxrt1050.c
7154b046d8f3a44 Jesse Taube 2022-01-11 35
7154b046d8f3a44 Jesse Taube 2022-01-11 36 static int imxrt1050_clocks_probe(struct platform_device *pdev)
7154b046d8f3a44 Jesse Taube 2022-01-11 37 {
7154b046d8f3a44 Jesse Taube 2022-01-11 38 void __iomem *ccm_base;
7154b046d8f3a44 Jesse Taube 2022-01-11 39 void __iomem *pll_base;
7154b046d8f3a44 Jesse Taube 2022-01-11 40 struct device *dev = &pdev->dev;
7154b046d8f3a44 Jesse Taube 2022-01-11 41 struct device_node *np = dev->of_node;
7154b046d8f3a44 Jesse Taube 2022-01-11 42 struct device_node *anp;
7154b046d8f3a44 Jesse Taube 2022-01-11 43 int ret;
7154b046d8f3a44 Jesse Taube 2022-01-11 44
7154b046d8f3a44 Jesse Taube 2022-01-11 45 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
7154b046d8f3a44 Jesse Taube 2022-01-11 46 IMXRT1050_CLK_END), GFP_KERNEL);
7154b046d8f3a44 Jesse Taube 2022-01-11 47 if (WARN_ON(!clk_hw_data))
7154b046d8f3a44 Jesse Taube 2022-01-11 48 return -ENOMEM;
7154b046d8f3a44 Jesse Taube 2022-01-11 49
7154b046d8f3a44 Jesse Taube 2022-01-11 50 clk_hw_data->num = IMXRT1050_CLK_END;
7154b046d8f3a44 Jesse Taube 2022-01-11 51 hws = clk_hw_data->hws;
7154b046d8f3a44 Jesse Taube 2022-01-11 52
7154b046d8f3a44 Jesse Taube 2022-01-11 53 hws[IMXRT1050_CLK_OSC] = imx_obtain_fixed_clk_hw(np, "osc");
7154b046d8f3a44 Jesse Taube 2022-01-11 54
7154b046d8f3a44 Jesse Taube 2022-01-11 55 anp = of_find_compatible_node(NULL, NULL, "fsl,imxrt-anatop");
7154b046d8f3a44 Jesse Taube 2022-01-11 56 pll_base = of_iomap(anp, 0);
7154b046d8f3a44 Jesse Taube 2022-01-11 57 of_node_put(anp);
7154b046d8f3a44 Jesse Taube 2022-01-11 58 if (WARN_ON(!pll_base))
7154b046d8f3a44 Jesse Taube 2022-01-11 59 return -ENOMEM;
7154b046d8f3a44 Jesse Taube 2022-01-11 60
7154b046d8f3a44 Jesse Taube 2022-01-11 61 /* Anatop clocks */
7154b046d8f3a44 Jesse Taube 2022-01-11 62 hws[IMXRT1050_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0UL);
7154b046d8f3a44 Jesse Taube 2022-01-11 63
7154b046d8f3a44 Jesse Taube 2022-01-11 64 hws[IMXRT1050_CLK_PLL1_REF_SEL] = imx_clk_hw_mux("pll1_arm_ref_sel",
7154b046d8f3a44 Jesse Taube 2022-01-11 65 pll_base + 0x0, 14, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 66 hws[IMXRT1050_CLK_PLL2_REF_SEL] = imx_clk_hw_mux("pll2_sys_ref_sel",
7154b046d8f3a44 Jesse Taube 2022-01-11 67 pll_base + 0x30, 14, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 68 hws[IMXRT1050_CLK_PLL3_REF_SEL] = imx_clk_hw_mux("pll3_usb_otg_ref_sel",
7154b046d8f3a44 Jesse Taube 2022-01-11 69 pll_base + 0x10, 14, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 70 hws[IMXRT1050_CLK_PLL5_REF_SEL] = imx_clk_hw_mux("pll5_video_ref_sel",
7154b046d8f3a44 Jesse Taube 2022-01-11 71 pll_base + 0xa0, 14, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 72
7154b046d8f3a44 Jesse Taube 2022-01-11 73 hws[IMXRT1050_CLK_PLL1_ARM] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1_arm",
7154b046d8f3a44 Jesse Taube 2022-01-11 @74 "pll1_arm_ref_sel", pll_base + 0x0, 0x7f);
7154b046d8f3a44 Jesse Taube 2022-01-11 75 hws[IMXRT1050_CLK_PLL2_SYS] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2_sys",
7154b046d8f3a44 Jesse Taube 2022-01-11 76 "pll2_sys_ref_sel", pll_base + 0x30, 0x1);
7154b046d8f3a44 Jesse Taube 2022-01-11 77 hws[IMXRT1050_CLK_PLL3_USB_OTG] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3_usb_otg",
7154b046d8f3a44 Jesse Taube 2022-01-11 78 "pll3_usb_otg_ref_sel", pll_base + 0x10, 0x1);
7154b046d8f3a44 Jesse Taube 2022-01-11 79 hws[IMXRT1050_CLK_PLL5_VIDEO] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5_video",
7154b046d8f3a44 Jesse Taube 2022-01-11 80 "pll5_video_ref_sel", pll_base + 0xa0, 0x7f);
7154b046d8f3a44 Jesse Taube 2022-01-11 81
7154b046d8f3a44 Jesse Taube 2022-01-11 82 /* PLL bypass out */
7154b046d8f3a44 Jesse Taube 2022-01-11 83 hws[IMXRT1050_CLK_PLL1_BYPASS] = imx_clk_hw_mux_flags("pll1_bypass", pll_base + 0x0, 16, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 84 pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
7154b046d8f3a44 Jesse Taube 2022-01-11 85 hws[IMXRT1050_CLK_PLL2_BYPASS] = imx_clk_hw_mux_flags("pll2_bypass", pll_base + 0x30, 16, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 86 pll2_bypass_sels, ARRAY_SIZE(pll2_bypass_sels), CLK_SET_RATE_PARENT);
7154b046d8f3a44 Jesse Taube 2022-01-11 87 hws[IMXRT1050_CLK_PLL3_BYPASS] = imx_clk_hw_mux_flags("pll3_bypass", pll_base + 0x10, 16, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 88 pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
7154b046d8f3a44 Jesse Taube 2022-01-11 89 hws[IMXRT1050_CLK_PLL5_BYPASS] = imx_clk_hw_mux_flags("pll5_bypass", pll_base + 0xa0, 16, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 90 pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
7154b046d8f3a44 Jesse Taube 2022-01-11 91
7154b046d8f3a44 Jesse Taube 2022-01-11 92 hws[IMXRT1050_CLK_VIDEO_POST_DIV_SEL] = imx_clk_hw_divider("video_post_div_sel",
7154b046d8f3a44 Jesse Taube 2022-01-11 93 "pll5_video", pll_base + 0xa0, 19, 2);
7154b046d8f3a44 Jesse Taube 2022-01-11 94 hws[IMXRT1050_CLK_VIDEO_DIV] = imx_clk_hw_divider("video_div",
7154b046d8f3a44 Jesse Taube 2022-01-11 95 "video_post_div_sel", pll_base + 0x170, 30, 2);
7154b046d8f3a44 Jesse Taube 2022-01-11 96
7154b046d8f3a44 Jesse Taube 2022-01-11 97 hws[IMXRT1050_CLK_PLL3_80M] = imx_clk_hw_fixed_factor("pll3_80m", "pll3_usb_otg", 1, 6);
7154b046d8f3a44 Jesse Taube 2022-01-11 98
7154b046d8f3a44 Jesse Taube 2022-01-11 99 hws[IMXRT1050_CLK_PLL2_PFD0_352M] = imx_clk_hw_pfd("pll2_pfd0_352m", "pll2_sys", pll_base + 0x100, 0);
7154b046d8f3a44 Jesse Taube 2022-01-11 100 hws[IMXRT1050_CLK_PLL2_PFD1_594M] = imx_clk_hw_pfd("pll2_pfd1_594m", "pll2_sys", pll_base + 0x100, 1);
7154b046d8f3a44 Jesse Taube 2022-01-11 101 hws[IMXRT1050_CLK_PLL2_PFD2_396M] = imx_clk_hw_pfd("pll2_pfd2_396m", "pll2_sys", pll_base + 0x100, 2);
7154b046d8f3a44 Jesse Taube 2022-01-11 102 hws[IMXRT1050_CLK_PLL3_PFD1_664_62M] = imx_clk_hw_pfd("pll3_pfd1_664_62m", "pll3_usb_otg", pll_base + 0xf0, 1);
7154b046d8f3a44 Jesse Taube 2022-01-11 103 hws[IMXRT1050_CLK_PLL3_PFD3_454_74M] = imx_clk_hw_pfd("pll3_pfd3_454_74m", "pll3_usb_otg", pll_base + 0xf0, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 104
7154b046d8f3a44 Jesse Taube 2022-01-11 105 /* CCM clocks */
7154b046d8f3a44 Jesse Taube 2022-01-11 106 ccm_base = devm_platform_ioremap_resource(pdev, 0);
7154b046d8f3a44 Jesse Taube 2022-01-11 107 if (WARN_ON(IS_ERR(ccm_base)))
7154b046d8f3a44 Jesse Taube 2022-01-11 108 return PTR_ERR(ccm_base);
7154b046d8f3a44 Jesse Taube 2022-01-11 109
7154b046d8f3a44 Jesse Taube 2022-01-11 110 hws[IMXRT1050_CLK_ARM_PODF] = imx_clk_hw_divider("arm_podf", "pll1_arm", ccm_base + 0x10, 0, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 111 hws[IMXRT1050_CLK_PRE_PERIPH_SEL] = imx_clk_hw_mux("pre_periph_sel", ccm_base + 0x18, 18, 2,
7154b046d8f3a44 Jesse Taube 2022-01-11 112 pre_periph_sels, ARRAY_SIZE(pre_periph_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 113 hws[IMXRT1050_CLK_PERIPH_SEL] = imx_clk_hw_mux("periph_sel", ccm_base + 0x14, 25, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 114 periph_sels, ARRAY_SIZE(periph_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 115 hws[IMXRT1050_CLK_USDHC1_SEL] = imx_clk_hw_mux("usdhc1_sel", ccm_base + 0x1c, 16, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 116 usdhc_sels, ARRAY_SIZE(usdhc_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 117 hws[IMXRT1050_CLK_USDHC2_SEL] = imx_clk_hw_mux("usdhc2_sel", ccm_base + 0x1c, 17, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 118 usdhc_sels, ARRAY_SIZE(usdhc_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 119 hws[IMXRT1050_CLK_LPUART_SEL] = imx_clk_hw_mux("lpuart_sel", ccm_base + 0x24, 6, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 120 lpuart_sels, ARRAY_SIZE(lpuart_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 121 hws[IMXRT1050_CLK_LCDIF_SEL] = imx_clk_hw_mux("lcdif_sel", ccm_base + 0x38, 15, 3,
7154b046d8f3a44 Jesse Taube 2022-01-11 122 lcdif_sels, ARRAY_SIZE(lcdif_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 123 hws[IMXRT1050_CLK_PER_CLK_SEL] = imx_clk_hw_mux("per_sel", ccm_base + 0x1C, 6, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 124 per_sels, ARRAY_SIZE(per_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 125 hws[IMXRT1050_CLK_SEMC_ALT_SEL] = imx_clk_hw_mux("semc_alt_sel", ccm_base + 0x14, 7, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 126 semc_alt_sels, ARRAY_SIZE(semc_alt_sels));
7154b046d8f3a44 Jesse Taube 2022-01-11 127 hws[IMXRT1050_CLK_SEMC_SEL] = imx_clk_hw_mux_flags("semc_sel", ccm_base + 0x14, 6, 1,
7154b046d8f3a44 Jesse Taube 2022-01-11 128 semc_sels, ARRAY_SIZE(semc_sels), CLK_IS_CRITICAL);
7154b046d8f3a44 Jesse Taube 2022-01-11 129
7154b046d8f3a44 Jesse Taube 2022-01-11 130 hws[IMXRT1050_CLK_AHB_PODF] = imx_clk_hw_divider("ahb", "periph_sel", ccm_base + 0x14, 10, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 131 hws[IMXRT1050_CLK_IPG_PDOF] = imx_clk_hw_divider("ipg", "ahb", ccm_base + 0x14, 8, 2);
7154b046d8f3a44 Jesse Taube 2022-01-11 132 hws[IMXRT1050_CLK_PER_PDOF] = imx_clk_hw_divider("per", "per_sel", ccm_base + 0x1C, 0, 5);
7154b046d8f3a44 Jesse Taube 2022-01-11 133
7154b046d8f3a44 Jesse Taube 2022-01-11 134 hws[IMXRT1050_CLK_USDHC1_PODF] = imx_clk_hw_divider("usdhc1_podf", "usdhc1_sel", ccm_base + 0x24, 11, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 135 hws[IMXRT1050_CLK_USDHC2_PODF] = imx_clk_hw_divider("usdhc2_podf", "usdhc2_sel", ccm_base + 0x24, 16, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 136 hws[IMXRT1050_CLK_LPUART_PODF] = imx_clk_hw_divider("lpuart_podf", "lpuart_sel", ccm_base + 0x24, 0, 6);
7154b046d8f3a44 Jesse Taube 2022-01-11 137 hws[IMXRT1050_CLK_LCDIF_PRED] = imx_clk_hw_divider("lcdif_pred", "lcdif_sel", ccm_base + 0x38, 12, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 138 hws[IMXRT1050_CLK_LCDIF_PODF] = imx_clk_hw_divider("lcdif_podf", "lcdif_pred", ccm_base + 0x18, 23, 3);
7154b046d8f3a44 Jesse Taube 2022-01-11 139
7154b046d8f3a44 Jesse Taube 2022-01-11 140 hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
7154b046d8f3a44 Jesse Taube 2022-01-11 141 hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
7154b046d8f3a44 Jesse Taube 2022-01-11 142 hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
7154b046d8f3a44 Jesse Taube 2022-01-11 143 hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
7154b046d8f3a44 Jesse Taube 2022-01-11 144 hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
7154b046d8f3a44 Jesse Taube 2022-01-11 145 hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
7154b046d8f3a44 Jesse Taube 2022-01-11 146 imx_check_clk_hws(hws, IMXRT1050_CLK_END);
7154b046d8f3a44 Jesse Taube 2022-01-11 147
7154b046d8f3a44 Jesse Taube 2022-01-11 148 ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
7154b046d8f3a44 Jesse Taube 2022-01-11 149 if (ret < 0) {
7154b046d8f3a44 Jesse Taube 2022-01-11 150 dev_err(dev, "Failed to register clks for i.MXRT1050.\n");
7154b046d8f3a44 Jesse Taube 2022-01-11 151 imx_unregister_hw_clocks(hws, IMXRT1050_CLK_END);
7154b046d8f3a44 Jesse Taube 2022-01-11 152 }
7154b046d8f3a44 Jesse Taube 2022-01-11 153 return ret;
7154b046d8f3a44 Jesse Taube 2022-01-11 154 }
7154b046d8f3a44 Jesse Taube 2022-01-11 155 static const struct of_device_id imxrt1050_clk_of_match[] = {
7154b046d8f3a44 Jesse Taube 2022-01-11 156 { .compatible = "fsl,imxrt1050-ccm" },
7154b046d8f3a44 Jesse Taube 2022-01-11 157 { /* Sentinel */ }
7154b046d8f3a44 Jesse Taube 2022-01-11 158 };
7154b046d8f3a44 Jesse Taube 2022-01-11 159 MODULE_DEVICE_TABLE(of, imxrt1050_clk_of_match);
7154b046d8f3a44 Jesse Taube 2022-01-11 160
Hi Jesse,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on abelvesa/clk/imx v5.19]
[cannot apply to soc/for-next linus/master next-20220812]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-defconfig (https://download.01.org/0day-ci/archive/20220814/202208142248.DFj3YiOA-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/96413cc0300321ec18d27ca9983f349a41f99706
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
git checkout 96413cc0300321ec18d27ca9983f349a41f99706
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/clk/imx/clk-imx6q.c:21:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c: In function 'imx6q_clocks_init':
>> drivers/clk/imx/clk-imx6q.c:477:101: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
477 | hws[IMX6QDL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:478:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
478 | hws[IMX6QDL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:479:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
479 | hws[IMX6QDL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:480:101: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
480 | hws[IMX6QDL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:481:101: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
481 | hws[IMX6QDL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:482:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
482 | hws[IMX6QDL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6q.c:483:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
483 | hws[IMX6QDL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-imx6sl.c:16:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c: In function 'imx6sl_clocks_init':
>> drivers/clk/imx/clk-imx6sl.c:217:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
217 | hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:218:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
218 | hws[IMX6SL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:219:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
219 | hws[IMX6SL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:220:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
220 | hws[IMX6SL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:221:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
221 | hws[IMX6SL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:222:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
222 | hws[IMX6SL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sl.c:223:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
223 | hws[IMX6SL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-imx6sll.c:17:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c: In function 'imx6sll_clocks_init':
>> drivers/clk/imx/clk-imx6sll.c:123:110: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
123 | hws[IMX6SLL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "pll1_bypass_src", base + 0x00, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:124:112: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
124 | hws[IMX6SLL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "pll2_bypass_src", base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:125:109: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
125 | hws[IMX6SLL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "pll3_bypass_src", base + 0x10, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:126:110: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
126 | hws[IMX6SLL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "pll4_bypass_src", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:127:110: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
127 | hws[IMX6SLL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "pll5_bypass_src", base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:128:117: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
128 | hws[IMX6SLL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "pll6_bypass_src", base + 0xe0, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sll.c:129:109: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
129 | hws[IMX6SLL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "pll7_bypass_src", base + 0x20, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-imx6sx.c:19:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c: In function 'imx6sx_clocks_init':
>> drivers/clk/imx/clk-imx6sx.c:160:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
160 | hws[IMX6SX_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:161:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
161 | hws[IMX6SX_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:162:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
162 | hws[IMX6SX_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:163:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
163 | hws[IMX6SX_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:164:100: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
164 | hws[IMX6SX_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:165:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
165 | hws[IMX6SX_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6sx.c:166:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
166 | hws[IMX6SX_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-imx6ul.c:18:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c: In function 'imx6ul_clocks_init':
>> drivers/clk/imx/clk-imx6ul.c:149:98: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
149 | hws[IMX6UL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:150:99: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
150 | hws[IMX6UL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:151:97: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
151 | hws[IMX6UL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll3", "osc", base + 0x10, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:152:98: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
152 | hws[IMX6UL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll4", "osc", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:153:98: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
153 | hws[IMX6UL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV, "pll5", "osc", base + 0xa0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:154:97: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
154 | hws[IMX6UL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx6ul.c:155:97: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
155 | hws[IMX6UL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB, "pll7", "osc", base + 0x20, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-imx7d.c:19:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c: In function 'imx7d_clocks_init':
>> drivers/clk/imx/clk-imx7d.c:409:108: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
409 | hws[IMX7D_PLL_ARM_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll_arm_main", "osc", base + 0x60, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c:410:114: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
410 | hws[IMX7D_PLL_DRAM_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_DDR_IMX7, "pll_dram_main", "osc", base + 0x70, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c:411:111: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
411 | hws[IMX7D_PLL_SYS_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll_sys_main", "osc", base + 0xb0, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c:412:114: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
412 | hws[IMX7D_PLL_ENET_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_ENET_IMX7, "pll_enet_main", "osc", base + 0xe0, 0x0);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c:413:115: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
413 | hws[IMX7D_PLL_AUDIO_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_AV_IMX7, "pll_audio_main", "osc", base + 0xf0, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-imx7d.c:414:116: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
414 | hws[IMX7D_PLL_VIDEO_MAIN] = imx_clk_hw_pllv3(IMX_PLLV3_AV_IMX7, "pll_video_main", "osc", base + 0x130, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
--
In file included from drivers/clk/imx/clk-vf610.c:12:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c: In function 'vf610_clocks_init':
>> drivers/clk/imx/clk-vf610.c:219:107: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
219 | clk[VF610_CLK_PLL1] = imx_clk_pllv3(IMX_PLLV3_SYS_VF610, "pll1", "pll1_bypass_src", PLL1_CTRL, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:220:107: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
220 | clk[VF610_CLK_PLL2] = imx_clk_pllv3(IMX_PLLV3_SYS_VF610, "pll2", "pll2_bypass_src", PLL2_CTRL, 0x1);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:221:111: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
221 | clk[VF610_CLK_PLL3] = imx_clk_pllv3(IMX_PLLV3_USB_VF610, "pll3", "pll3_bypass_src", PLL3_CTRL, 0x2);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:222:106: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
222 | clk[VF610_CLK_PLL4] = imx_clk_pllv3(IMX_PLLV3_AV, "pll4", "pll4_bypass_src", PLL4_CTRL, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:223:105: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
223 | clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:224:106: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
224 | clk[VF610_CLK_PLL6] = imx_clk_pllv3(IMX_PLLV3_AV, "pll6", "pll6_bypass_src", PLL6_CTRL, 0x7f);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
drivers/clk/imx/clk-vf610.c:225:111: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
225 | clk[VF610_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB_VF610, "pll7", "pll7_bypass_src", PLL7_CTRL, 0x2);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
vim +/imx_clk_hw_pllv3 +477 drivers/clk/imx/clk-imx6q.c
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 430
53bb71da1c5c14 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2013-05-21 431 static void __init imx6q_clocks_init(struct device_node *ccm_node)
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 432 {
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 433 struct device_node *np;
5d283b08380086 drivers/clk/imx/clk-imx6q.c Fabio Estevam 2016-10-17 434 void __iomem *anatop_base, *base;
a94f8ecb2f778f arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2013-07-18 435 int ret;
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 436
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 437 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 438 IMX6QDL_CLK_END), GFP_KERNEL);
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 439 if (WARN_ON(!clk_hw_data))
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 440 return;
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 441
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 442 clk_hw_data->num = IMX6QDL_CLK_END;
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 443 hws = clk_hw_data->hws;
a29be9185d195b drivers/clk/imx/clk-imx6q.c Lucas Stach 2018-11-15 444
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 445 hws[IMX6QDL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
a29be9185d195b drivers/clk/imx/clk-imx6q.c Lucas Stach 2018-11-15 446
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 447 hws[IMX6QDL_CLK_CKIL] = imx6q_obtain_fixed_clk_hw(ccm_node, "ckil", 0);
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 448 hws[IMX6QDL_CLK_CKIH] = imx6q_obtain_fixed_clk_hw(ccm_node, "ckih1", 0);
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 449 hws[IMX6QDL_CLK_OSC] = imx6q_obtain_fixed_clk_hw(ccm_node, "osc", 0);
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 450
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 451 /* Clock source from external clock via CLK1/2 PADs */
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 452 hws[IMX6QDL_CLK_ANACLK1] = imx6q_obtain_fixed_clk_hw(ccm_node, "anaclk1", 0);
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 453 hws[IMX6QDL_CLK_ANACLK2] = imx6q_obtain_fixed_clk_hw(ccm_node, "anaclk2", 0);
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 454
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 455 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
5d283b08380086 drivers/clk/imx/clk-imx6q.c Fabio Estevam 2016-10-17 456 anatop_base = base = of_iomap(np, 0);
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 457 WARN_ON(!base);
c9ec1d8fef31b5 drivers/clk/imx/clk-imx6q.c Yangtao Li 2018-12-26 458 of_node_put(np);
2acd1b6f889c04 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2012-04-04 459
2df1d026edc11e arch/arm/mach-imx/clk-imx6q.c Philipp Zabel 2013-03-29 460 /* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
961dfd37fa165c arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2015-04-26 461 if (clk_on_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_1_0) {
2df1d026edc11e arch/arm/mach-imx/clk-imx6q.c Philipp Zabel 2013-03-29 462 post_div_table[1].div = 1;
2df1d026edc11e arch/arm/mach-imx/clk-imx6q.c Philipp Zabel 2013-03-29 463 post_div_table[2].div = 1;
2df1d026edc11e arch/arm/mach-imx/clk-imx6q.c Philipp Zabel 2013-03-29 464 video_div_table[1].div = 1;
81ef447950bf09 arch/arm/mach-imx/clk-imx6q.c Gary Bisson 2014-12-03 465 video_div_table[3].div = 1;
d2a10a1727b394 arch/arm/mach-imx/clk-imx6q.c Dmitry Voytik 2014-11-06 466 }
2df1d026edc11e arch/arm/mach-imx/clk-imx6q.c Philipp Zabel 2013-03-29 467
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 468 hws[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 469 hws[IMX6QDL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 470 hws[IMX6QDL_PLL3_BYPASS_SRC] = imx_clk_hw_mux("pll3_bypass_src", base + 0x10, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 471 hws[IMX6QDL_PLL4_BYPASS_SRC] = imx_clk_hw_mux("pll4_bypass_src", base + 0x70, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 472 hws[IMX6QDL_PLL5_BYPASS_SRC] = imx_clk_hw_mux("pll5_bypass_src", base + 0xa0, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 473 hws[IMX6QDL_PLL6_BYPASS_SRC] = imx_clk_hw_mux("pll6_bypass_src", base + 0xe0, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 474 hws[IMX6QDL_PLL7_BYPASS_SRC] = imx_clk_hw_mux("pll7_bypass_src", base + 0x20, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
b1f156db47ae91 arch/arm/mach-imx/clk-imx6q.c Shawn Guo 2014-09-01 475
2b254693bef4f1 arch/arm/mach-imx/clk-imx6q.c Sascha Hauer 2012-11-22 476 /* type name parent_name base div_mask */
992b703b5b3897 drivers/clk/imx/clk-imx6q.c Abel Vesa 2019-05-29 @477 hws[IMX6QDL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS, "pll1", "osc", base + 0x00, 0x7f);
Hi Jesse,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on abelvesa/clk/imx v5.19]
[cannot apply to soc/for-next linus/master next-20220812]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: mips-allyesconfig (https://download.01.org/0day-ci/archive/20220814/202208142303.ZxW0QfM2-lkp@intel.com/config)
compiler: mips-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/96413cc0300321ec18d27ca9983f349a41f99706
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Jesse-Taube/Add-support-for-the-i-MXRT1170-evk/20220724-000710
git checkout 96413cc0300321ec18d27ca9983f349a41f99706
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=mips SHELL=/bin/bash drivers/clk/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from drivers/clk/imx/clk-pllv3.c:14:
drivers/clk/imx/clk.h:268:74: error: macro "imx_clk_hw_pllv3" requires 8 arguments, but only 5 given
268 | const char *parent_name, void __iomem *base, u32 div_mask);
| ^
drivers/clk/imx/clk.h:107: note: macro "imx_clk_hw_pllv3" defined here
107 | #define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \
|
>> drivers/clk/imx/clk-pllv3.c:445:16: warning: no previous prototype for '__imx_clk_hw_pllv3' [-Wmissing-prototypes]
445 | struct clk_hw *__imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
| ^~~~~~~~~~~~~~~~~~
vim +/__imx_clk_hw_pllv3 +445 drivers/clk/imx/clk-pllv3.c
444
> 445 struct clk_hw *__imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index eea32f87c60a..68b1498cafe1 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -21,8 +21,8 @@ #define PLL_VF610_NUM_OFFSET 0x20 #define PLL_VF610_DENOM_OFFSET 0x30 -#define BM_PLL_POWER (0x1 << 12) #define BM_PLL_LOCK (0x1 << 31) +#define BM_PLL_LOCK_V2 (0x1 << 29) #define IMX7_ENET_PLL_POWER (0x1 << 5) #define IMX7_DDR_PLL_POWER (0x1 << 20) @@ -34,6 +34,7 @@ * @base: base address of PLL registers * @power_bit: pll power bit mask * @powerup_set: set power_bit to power up the PLL + * @lock_bit: pll lock bit mask * @div_mask: mask of divider bits * @div_shift: shift of divider bits * @ref_clock: reference clock rate @@ -48,6 +49,7 @@ struct clk_pllv3 { void __iomem *base; u32 power_bit; bool powerup_set; + u32 lock_bit; u32 div_mask; u32 div_shift; unsigned long ref_clock; @@ -65,7 +67,7 @@ static int clk_pllv3_wait_lock(struct clk_pllv3 *pll) if ((pll->powerup_set && !val) || (!pll->powerup_set && val)) return 0; - return readl_relaxed_poll_timeout(pll->base, val, val & BM_PLL_LOCK, + return readl_relaxed_poll_timeout(pll->base, val, val & pll->lock_bit, 500, PLL_LOCK_TIMEOUT); } @@ -101,7 +103,7 @@ static int clk_pllv3_is_prepared(struct clk_hw *hw) { struct clk_pllv3 *pll = to_clk_pllv3(hw); - if (readl_relaxed(pll->base) & BM_PLL_LOCK) + if (readl_relaxed(pll->base) & pll->lock_bit) return 1; return 0; @@ -155,6 +157,39 @@ static const struct clk_ops clk_pllv3_ops = { .set_rate = clk_pllv3_set_rate, }; +static int clk_pllv3_genericv2_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_pllv3 *pll = to_clk_pllv3(hw); + u32 val, div; + + div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; + val = (div == 0) ? parent_rate * 22 : parent_rate * 20; + + if (rate == val) + return 0; + + return -EINVAL; +} + +static unsigned long clk_pllv3_genericv2_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_pllv3 *pll = to_clk_pllv3(hw); + u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; + + return (div == 0) ? parent_rate * 22 : parent_rate * 20; +} + +static const struct clk_ops clk_pllv3_genericv2_ops = { + .prepare = clk_pllv3_prepare, + .unprepare = clk_pllv3_unprepare, + .is_prepared = clk_pllv3_is_prepared, + .recalc_rate = clk_pllv3_genericv2_recalc_rate, + .round_rate = clk_pllv3_round_rate, + .set_rate = clk_pllv3_genericv2_set_rate, +}; + static unsigned long clk_pllv3_sys_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -407,9 +442,9 @@ static const struct clk_ops clk_pllv3_enet_ops = { .recalc_rate = clk_pllv3_enet_recalc_rate, }; -struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name, +struct clk_hw *__imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, - u32 div_mask) + u32 div_mask, u8 pwr_bit) { struct clk_pllv3 *pll; const struct clk_ops *ops; @@ -421,11 +456,21 @@ struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name, if (!pll) return ERR_PTR(-ENOMEM); - pll->power_bit = BM_PLL_POWER; + pll->power_bit = pwr_bit; + pll->lock_bit = BM_PLL_LOCK; pll->num_offset = PLL_NUM_OFFSET; pll->denom_offset = PLL_DENOM_OFFSET; switch (type) { + case IMX_PLLV3_GENERICV2: + pll->lock_bit = BM_PLL_LOCK_V2; + pll->powerup_set = true; + ops = &clk_pllv3_genericv2_ops; + break; + case IMX_PLLV3_SYSV2: + pll->lock_bit = BM_PLL_LOCK_V2; + pll->powerup_set = true; + fallthrough; case IMX_PLLV3_SYS: ops = &clk_pllv3_sys_ops; break; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 5061a06468df..782100b2846d 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -6,6 +6,8 @@ #include <linux/spinlock.h> #include <linux/clk-provider.h> +#define BM_PLL_POWER (0x1 << 12) + extern spinlock_t imx_ccm_lock; extern bool mcore_booted; @@ -102,6 +104,11 @@ extern struct imx_fracn_gppll_clk imx_fracn_gppll; to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ cgr_val, cgr_mask, clk_gate_flags, lock, share_count)) +#define imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \ + bypass1, bypass2, base, flags) \ + __imx_clk_hw_pllv3(name, parent_names, num_parents, parent, \ + bypass1, bypass2, base, flags, BM_PLL_POWER) + #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ to_clk(imx_clk_hw_pllv3(type, name, parent_name, base, div_mask)) @@ -242,6 +249,8 @@ struct clk_hw *imx_clk_hw_sscg_pll(const char *name, enum imx_pllv3_type { IMX_PLLV3_GENERIC, + IMX_PLLV3_GENERICV2, + IMX_PLLV3_SYSV2, IMX_PLLV3_SYS, IMX_PLLV3_USB, IMX_PLLV3_USB_VF610, @@ -253,6 +262,8 @@ enum imx_pllv3_type { IMX_PLLV3_AV_IMX7, }; +void imx_clk_hw_pll3_powerbit(struct clk_hw *hw, u8 shift); + struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, u32 div_mask);
The i.MXRT1170 has a pll that has the multiplier bits inverted and cannot be changed add IMX_PLLV3_GENERICV2. The i.MXRT1170 also has the lock bit moved as well as the power bit inverted the power bit also is in different locations on each pll control register. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> --- V1 -> V2: - Nothing done V2 -> V3: - Nothing done V3 -> V4: - Nothing done V4 -> V5: - Add __imx_clk_hw_pllv3 to change power bit - Add BM_PLL_POWER and imx_clk_hw_pllv3 to header - Remove imx_clk_hw_pll3_powerbit --- drivers/clk/imx/clk-pllv3.c | 57 +++++++++++++++++++++++++++++++++---- drivers/clk/imx/clk.h | 11 +++++++ 2 files changed, 62 insertions(+), 6 deletions(-)