| Message ID | 20220726180623.1668-5-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Add support for Renesas RZ/Five SoC | expand |
On 26/07/2022 20:06, Lad Prabhakar wrote: > Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml > > diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml > new file mode 100644 > index 000000000000..f72f8aea6a82 > --- /dev/null > +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > @@ -0,0 +1,49 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/riscv/renesas.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/Five Platform Device Tree Bindings > + > +maintainers: > + - Geert Uytterhoeven <geert+renesas@glider.be> > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > + > +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch > +select: > + not: > + properties: > + compatible: > + contains: > + items: I think you should rather ignore the RiscV SoCs, not specific board. > + - const: renesas,smarc-evk > + - enum: > + - renesas,r9a07g043u11 > + - renesas,r9a07g043u12 > + - renesas,r9a07g044c1 > + - renesas,r9a07g044c2 > + - renesas,r9a07g044l1 > + - renesas,r9a07g044l2 > + - renesas,r9a07g054l1 > + - renesas,r9a07g054l2 > + - enum: > + - renesas,r9a07g043 > + - renesas,r9a07g044 > + - renesas,r9a07g054 Did you actually test that it works and properly matches? > + > +properties: > + $nodename: > + const: '/' > + compatible: > + oneOf: > + - description: RZ/Five (R9A07G043) > + items: > + - enum: > + - renesas,smarc-evk # SMARC EVK > + - const: renesas,r9a07g043f01 > + - const: renesas,r9a07g043 > + > +additionalProperties: true > + > +... Best regards, Krzysztof
Hi Krzysztof, Thank you for the review. On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 26/07/2022 20:06, Lad Prabhakar wrote: > > Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ > > 1 file changed, 49 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml > > > > diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml > > new file mode 100644 > > index 000000000000..f72f8aea6a82 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > > @@ -0,0 +1,49 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/riscv/renesas.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Renesas RZ/Five Platform Device Tree Bindings > > + > > +maintainers: > > + - Geert Uytterhoeven <geert+renesas@glider.be> > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > + > > +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch > > +select: > > + not: > > + properties: > > + compatible: > > + contains: > > + items: > > I think you should rather ignore the RiscV SoCs, not specific board. > You mean to ignore ARM/64 SoCs? Agreed just the below enum, should do the trick. - enum: - renesas,r9a07g043u11 - renesas,r9a07g043u12 - renesas,r9a07g044c1 - renesas,r9a07g044c2 - renesas,r9a07g044l1 - renesas,r9a07g044l2 - renesas,r9a07g054l1 - renesas,r9a07g054l2 > > + - const: renesas,smarc-evk > > + - enum: > > + - renesas,r9a07g043u11 > > + - renesas,r9a07g043u12 > > + - renesas,r9a07g044c1 > > + - renesas,r9a07g044c2 > > + - renesas,r9a07g044l1 > > + - renesas,r9a07g044l2 > > + - renesas,r9a07g054l1 > > + - renesas,r9a07g054l2 > > + - enum: > > + - renesas,r9a07g043 > > + - renesas,r9a07g044 > > + - renesas,r9a07g054 > > Did you actually test that it works and properly matches? > Yes I have run the dtbs_check and dt_binding _check for ARM64 and RISC-V. Do you see any cases where it can fail? Cheers, Prabhakar
Hi Lad, Prabhakar, > Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > documentation for Renesas RZ/Five SoC and SMARC EVK > > Hi Krzysztof, > > Thank you for the review. > > On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: > > > > On 26/07/2022 20:06, Lad Prabhakar wrote: > > > Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this > SoC. > > > > > > Signed-off-by: Lad Prabhakar > > > <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > --- > > > .../devicetree/bindings/riscv/renesas.yaml | 49 > +++++++++++++++++++ > > > 1 file changed, 49 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/riscv/renesas.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml > > > b/Documentation/devicetree/bindings/riscv/renesas.yaml > > > new file mode 100644 > > > index 000000000000..f72f8aea6a82 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > > > @@ -0,0 +1,49 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > > +--- > > > +$id: > > > + > > > +title: Renesas RZ/Five Platform Device Tree Bindings > > > + > > > +maintainers: > > > + - Geert Uytterhoeven <geert+renesas@glider.be> > > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > + > > > +# We want to ignore this schema if the board is SMARC EVK based on > > > +ARM64 arch > > > +select: > > > + not: > > > + properties: > > > + compatible: > > > + contains: > > > + items: > > > > I think you should rather ignore the RiscV SoCs, not specific board. > > > You mean to ignore ARM/64 SoCs? > > Agreed just the below enum, should do the trick. > > - enum: > - renesas,r9a07g043u11 > - renesas,r9a07g043u12 > - renesas,r9a07g044c1 > - renesas,r9a07g044c2 > - renesas,r9a07g044l1 > - renesas,r9a07g044l2 > - renesas,r9a07g054l1 > - renesas,r9a07g054l2 Why do we need to add renesas,r9a07g044 and renesas,r9a07g054 in riscv file? These are arm64 only SoC's. Cheers, Biju > > > > + - const: renesas,smarc-evk > > > + - enum: > > > + - renesas,r9a07g043u11 > > > + - renesas,r9a07g043u12 > > > + - renesas,r9a07g044c1 > > > + - renesas,r9a07g044c2 > > > + - renesas,r9a07g044l1 > > > + - renesas,r9a07g044l2 > > > + - renesas,r9a07g054l1 > > > + - renesas,r9a07g054l2 > > > + - enum: > > > + - renesas,r9a07g043 > > > + - renesas,r9a07g044 > > > + - renesas,r9a07g054 > > > > Did you actually test that it works and properly matches? > > > Yes I have run the dtbs_check and dt_binding _check for ARM64 and RISC- > V. Do you see any cases where it can fail? > > Cheers, > Prabhakar
Hi Biju, On Wed, Jul 27, 2022 at 10:27 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > Hi Lad, Prabhakar, > > > Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > > documentation for Renesas RZ/Five SoC and SMARC EVK > > > > Hi Krzysztof, > > > > Thank you for the review. > > > > On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@linaro.org> wrote: > > > > > > On 26/07/2022 20:06, Lad Prabhakar wrote: > > > > Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this > > SoC. > > > > > > > > Signed-off-by: Lad Prabhakar > > > > <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > --- > > > > .../devicetree/bindings/riscv/renesas.yaml | 49 > > +++++++++++++++++++ > > > > 1 file changed, 49 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/riscv/renesas.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml > > > > b/Documentation/devicetree/bindings/riscv/renesas.yaml > > > > new file mode 100644 > > > > index 000000000000..f72f8aea6a82 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > > > > @@ -0,0 +1,49 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > > > +--- > > > > +$id: > > > > > + > > > > +title: Renesas RZ/Five Platform Device Tree Bindings > > > > + > > > > +maintainers: > > > > + - Geert Uytterhoeven <geert+renesas@glider.be> > > > > + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > + > > > > +# We want to ignore this schema if the board is SMARC EVK based on > > > > +ARM64 arch > > > > +select: > > > > + not: > > > > + properties: > > > > + compatible: > > > > + contains: > > > > + items: > > > > > > I think you should rather ignore the RiscV SoCs, not specific board. > > > > > You mean to ignore ARM/64 SoCs? > > > > Agreed just the below enum, should do the trick. > > > > - enum: > > - renesas,r9a07g043u11 > > - renesas,r9a07g043u12 > > - renesas,r9a07g044c1 > > - renesas,r9a07g044c2 > > - renesas,r9a07g044l1 > > - renesas,r9a07g044l2 > > - renesas,r9a07g054l1 > > - renesas,r9a07g054l2 > > Why do we need to add renesas,r9a07g044 and renesas,r9a07g054 > in riscv file? These are arm64 only SoC's. > The above needs to be added to avoid dtbs_check/dt_binding_check errors. The above hunk ignores the RISC-V schema if it's an ARM64 SoC. Cheers, Prabhakar > Cheers, > Biju > > > > > > > > > + - const: renesas,smarc-evk > > > > + - enum: > > > > + - renesas,r9a07g043u11 > > > > + - renesas,r9a07g043u12 > > > > + - renesas,r9a07g044c1 > > > > + - renesas,r9a07g044c2 > > > > + - renesas,r9a07g044l1 > > > > + - renesas,r9a07g044l2 > > > > + - renesas,r9a07g054l1 > > > > + - renesas,r9a07g054l2 > > > > + - enum: > > > > + - renesas,r9a07g043 > > > > + - renesas,r9a07g044 > > > > + - renesas,r9a07g054 > > > > > > Did you actually test that it works and properly matches? > > > > > Yes I have run the dtbs_check and dt_binding _check for ARM64 and RISC- > > V. Do you see any cases where it can fail? > > > > Cheers, > > Prabhakar
On 27/07/2022 11:05, Lad, Prabhakar wrote: > Hi Krzysztof, > > Thank you for the review. > > On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 26/07/2022 20:06, Lad Prabhakar wrote: >>> Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. >>> >>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >>> --- >>> .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ >>> 1 file changed, 49 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml >>> new file mode 100644 >>> index 000000000000..f72f8aea6a82 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml >>> @@ -0,0 +1,49 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/riscv/renesas.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Renesas RZ/Five Platform Device Tree Bindings >>> + >>> +maintainers: >>> + - Geert Uytterhoeven <geert+renesas@glider.be> >>> + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >>> + >>> +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch >>> +select: >>> + not: >>> + properties: >>> + compatible: >>> + contains: >>> + items: >> >> I think you should rather ignore the RiscV SoCs, not specific board. >> > You mean to ignore ARM/64 SoCs? > > Agreed just the below enum, should do the trick. > > - enum: > - renesas,r9a07g043u11 > - renesas,r9a07g043u12 > - renesas,r9a07g044c1 > - renesas,r9a07g044c2 > - renesas,r9a07g044l1 > - renesas,r9a07g044l2 > - renesas,r9a07g054l1 > - renesas,r9a07g054l2 > > >>> + - const: renesas,smarc-evk >>> + - enum: >>> + - renesas,r9a07g043u11 >>> + - renesas,r9a07g043u12 >>> + - renesas,r9a07g044c1 >>> + - renesas,r9a07g044c2 >>> + - renesas,r9a07g044l1 >>> + - renesas,r9a07g044l2 >>> + - renesas,r9a07g054l1 >>> + - renesas,r9a07g054l2 >>> + - enum: >>> + - renesas,r9a07g043 >>> + - renesas,r9a07g044 >>> + - renesas,r9a07g054 >> >> Did you actually test that it works and properly matches? >> > Yes I have run the dtbs_check and dt_binding _check for ARM64 and > RISC-V. Do you see any cases where it can fail? Just remove the renesas,smarc-evk2 from arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts. Do you see the error? Not from this schema. The only error you will see is that no matching schema was found. I don't think you can use such selects... Best regards, Krzysztof
Hi Krzysztof, On Wed, Jul 27, 2022 at 10:54 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 27/07/2022 11:05, Lad, Prabhakar wrote: > > Hi Krzysztof, > > > > Thank you for the review. > > > > On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@linaro.org> wrote: > >> > >> On 26/07/2022 20:06, Lad Prabhakar wrote: > >>> Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. > >>> > >>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > >>> --- > >>> .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ > >>> 1 file changed, 49 insertions(+) > >>> create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml > >>> > >>> diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml > >>> new file mode 100644 > >>> index 000000000000..f72f8aea6a82 > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > >>> @@ -0,0 +1,49 @@ > >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >>> +%YAML 1.2 > >>> +--- > >>> +$id: http://devicetree.org/schemas/riscv/renesas.yaml# > >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>> + > >>> +title: Renesas RZ/Five Platform Device Tree Bindings > >>> + > >>> +maintainers: > >>> + - Geert Uytterhoeven <geert+renesas@glider.be> > >>> + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > >>> + > >>> +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch > >>> +select: > >>> + not: > >>> + properties: > >>> + compatible: > >>> + contains: > >>> + items: > >> > >> I think you should rather ignore the RiscV SoCs, not specific board. > >> > > You mean to ignore ARM/64 SoCs? > > > > Agreed just the below enum, should do the trick. > > > > - enum: > > - renesas,r9a07g043u11 > > - renesas,r9a07g043u12 > > - renesas,r9a07g044c1 > > - renesas,r9a07g044c2 > > - renesas,r9a07g044l1 > > - renesas,r9a07g044l2 > > - renesas,r9a07g054l1 > > - renesas,r9a07g054l2 > > > > > >>> + - const: renesas,smarc-evk > >>> + - enum: > >>> + - renesas,r9a07g043u11 > >>> + - renesas,r9a07g043u12 > >>> + - renesas,r9a07g044c1 > >>> + - renesas,r9a07g044c2 > >>> + - renesas,r9a07g044l1 > >>> + - renesas,r9a07g044l2 > >>> + - renesas,r9a07g054l1 > >>> + - renesas,r9a07g054l2 > >>> + - enum: > >>> + - renesas,r9a07g043 > >>> + - renesas,r9a07g044 > >>> + - renesas,r9a07g054 > >> > >> Did you actually test that it works and properly matches? > >> > > Yes I have run the dtbs_check and dt_binding _check for ARM64 and > > RISC-V. Do you see any cases where it can fail? > > > Just remove the renesas,smarc-evk2 from > arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts. Do you see the > error? Not from this schema. The only error you will see is that no > matching schema was found. > I did run the dtbs_check test as per your suggestion (below is the log) and didn't see "no matching schema error" prasmi@prasmi:~/work/linux$ git diff diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts index 121e55282d18..b8129d85515f 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts @@ -11,5 +11,5 @@ / { model = "Renesas SMARC EVK based on r9a07g043u11"; - compatible = "renesas,smarc-evk", "renesas,r9a07g043u11", "renesas,r9a07g043"; + compatible = "renesas,r9a07g043u11", "renesas,r9a07g043"; }; prasmi@prasmi:~/work/linux$ rm Documentation/devicetree/bindings/processed-schema.json arch/arm64/boot/dts/renesas/*.dtb prasmi@prasmi:~/work/linux$ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- dtbs_check -j6 LINT Documentation/devicetree/bindings CHKDT Documentation/devicetree/bindings/processed-schema.json SCHEMA Documentation/devicetree/bindings/processed-schema.json DTC arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb DTC arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dtb DTC arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dtb DTC arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dtb DTC arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dtb CHECK arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb CHECK arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dtb CHECK arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dtb CHECK arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dtb CHECK arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dtb /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dtb: flash@0: compatible: 'oneOf' conditional failed, one must be fixed: ['micron,mt25qu512a', 'jedec,spi-nor'] is too long 'micron,mt25qu512a' does not match '^((((micron|spansion|st),)?(m25p(40|80|16|32|64|128)|n25q(32b|064|128a11|128a13|256a|512a|164k)))|atmel,at25df(321a|641|081a)|everspin,mr25h(10|40|128|256)|(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|(mxicy|macronix),mx25u(4033|4035)|(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|(sst|microchip),sst25vf(016b|032b|040b)|(sst,)?sst26wf016b|(sst,)?sst25wf(040b|080)|winbond,w25x(80|32)|(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$' 'micron,mt25qu512a' is not one of ['issi,is25lp016d', 'micron,mt25qu02g', 'mxicy,mx25r1635f', 'mxicy,mx25u6435f', 'mxicy,mx25v8035f', 'spansion,s25sl12801', 'spansion,s25fs512s'] 'jedec,spi-nor' was expected From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dtb:0:0: /soc/spi@10060000/flash@0: failed to match any schema with compatible: ['micron,mt25qu512a', 'jedec,spi-nor'] /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb: pinctrl@11030000: 'interrupt-controller' is a required property From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb: pinctrl@11030000: '#interrupt-cells' is a required property From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dtb: pinctrl@11030000: #address-cells: 'anyOf' conditional failed, one must be fixed: [[2]] is not of type 'object' From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dtb: flash@0: compatible: 'oneOf' conditional failed, one must be fixed: ['micron,mt25qu512a', 'jedec,spi-nor'] is too long 'micron,mt25qu512a' does not match '^((((micron|spansion|st),)?(m25p(40|80|16|32|64|128)|n25q(32b|064|128a11|128a13|256a|512a|164k)))|atmel,at25df(321a|641|081a)|everspin,mr25h(10|40|128|256)|(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|(mxicy|macronix),mx25u(4033|4035)|(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|(sst|microchip),sst25vf(016b|032b|040b)|(sst,)?sst26wf016b|(sst,)?sst25wf(040b|080)|winbond,w25x(80|32)|(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$' 'micron,mt25qu512a' is not one of ['issi,is25lp016d', 'micron,mt25qu02g', 'mxicy,mx25r1635f', 'mxicy,mx25u6435f', 'mxicy,mx25v8035f', 'spansion,s25sl12801', 'spansion,s25fs512s'] 'jedec,spi-nor' was expected From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dtb:0:0: /soc/spi@10060000/flash@0: failed to match any schema with compatible: ['micron,mt25qu512a', 'jedec,spi-nor'] /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dtb: pinctrl@11030000: #address-cells: 'anyOf' conditional failed, one must be fixed: [[2]] is not of type 'object' From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dtb: flash@0: compatible: 'oneOf' conditional failed, one must be fixed: ['micron,mt25qu512a', 'jedec,spi-nor'] is too long 'micron,mt25qu512a' does not match '^((((micron|spansion|st),)?(m25p(40|80|16|32|64|128)|n25q(32b|064|128a11|128a13|256a|512a|164k)))|atmel,at25df(321a|641|081a)|everspin,mr25h(10|40|128|256)|(mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|(mxicy|macronix),mx25u(4033|4035)|(spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|(sst|microchip),sst25vf(016b|032b|040b)|(sst,)?sst26wf016b|(sst,)?sst25wf(040b|080)|winbond,w25x(80|32)|(winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$' 'micron,mt25qu512a' is not one of ['issi,is25lp016d', 'micron,mt25qu02g', 'mxicy,mx25r1635f', 'mxicy,mx25u6435f', 'mxicy,mx25v8035f', 'spansion,s25sl12801', 'spansion,s25fs512s'] 'jedec,spi-nor' was expected From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dtb:0:0: /soc/spi@10060000/flash@0: failed to match any schema with compatible: ['micron,mt25qu512a', 'jedec,spi-nor'] /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb: usbphy-ctrl@11c40000: compatible:0: 'renesas,r9a07g043-usbphy-ctrl' is not one of ['renesas,r9a07g044-usbphy-ctrl', 'renesas,r9a07g054-usbphy-ctrl'] From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dtb:0:0: /soc/usbphy-ctrl@11c40000: failed to match any schema with compatible: ['renesas,r9a07g043-usbphy-ctrl', 'renesas,rzg2l-usbphy-ctrl'] /home/prasmi/work/linux/arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dtb: pinctrl@11030000: #address-cells: 'anyOf' conditional failed, one must be fixed: [[2]] is not of type 'object' From schema: /home/prasmi/work/linux/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml prasmi@prasmi:~/work/linux$ prasmi@prasmi:~/work/linux$ Note: I am using dtschema version 2022.7. > I don't think you can use such selects... > > Best regards, > Krzysztof Cheers, Prabhakar
On 27/07/2022 12:06, Lad, Prabhakar wrote: > Hi Krzysztof, > > On Wed, Jul 27, 2022 at 10:54 AM Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 27/07/2022 11:05, Lad, Prabhakar wrote: >>> Hi Krzysztof, >>> >>> Thank you for the review. >>> >>> On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski >>> <krzysztof.kozlowski@linaro.org> wrote: >>>> >>>> On 26/07/2022 20:06, Lad Prabhakar wrote: >>>>> Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. >>>>> >>>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >>>>> --- >>>>> .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ >>>>> 1 file changed, 49 insertions(+) >>>>> create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml >>>>> new file mode 100644 >>>>> index 000000000000..f72f8aea6a82 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml >>>>> @@ -0,0 +1,49 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/riscv/renesas.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: Renesas RZ/Five Platform Device Tree Bindings >>>>> + >>>>> +maintainers: >>>>> + - Geert Uytterhoeven <geert+renesas@glider.be> >>>>> + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> >>>>> + >>>>> +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch >>>>> +select: >>>>> + not: >>>>> + properties: >>>>> + compatible: >>>>> + contains: >>>>> + items: >>>> >>>> I think you should rather ignore the RiscV SoCs, not specific board. >>>> >>> You mean to ignore ARM/64 SoCs? >>> >>> Agreed just the below enum, should do the trick. >>> >>> - enum: >>> - renesas,r9a07g043u11 >>> - renesas,r9a07g043u12 >>> - renesas,r9a07g044c1 >>> - renesas,r9a07g044c2 >>> - renesas,r9a07g044l1 >>> - renesas,r9a07g044l2 >>> - renesas,r9a07g054l1 >>> - renesas,r9a07g054l2 >>> >>> >>>>> + - const: renesas,smarc-evk >>>>> + - enum: >>>>> + - renesas,r9a07g043u11 >>>>> + - renesas,r9a07g043u12 >>>>> + - renesas,r9a07g044c1 >>>>> + - renesas,r9a07g044c2 >>>>> + - renesas,r9a07g044l1 >>>>> + - renesas,r9a07g044l2 >>>>> + - renesas,r9a07g054l1 >>>>> + - renesas,r9a07g054l2 >>>>> + - enum: >>>>> + - renesas,r9a07g043 >>>>> + - renesas,r9a07g044 >>>>> + - renesas,r9a07g054 >>>> >>>> Did you actually test that it works and properly matches? >>>> >>> Yes I have run the dtbs_check and dt_binding _check for ARM64 and >>> RISC-V. Do you see any cases where it can fail? >> >> >> Just remove the renesas,smarc-evk2 from >> arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts. Do you see the >> error? Not from this schema. The only error you will see is that no >> matching schema was found. >> > I did run the dtbs_check test as per your suggestion (below is the > log) and didn't see "no matching schema error" > So you do not see any errors at all. Then it does not work, does it? Best regards, Krzysztof
Hi Krzysztof, On Wed, Jul 27, 2022 at 11:09 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 27/07/2022 12:06, Lad, Prabhakar wrote: > > Hi Krzysztof, > > > > On Wed, Jul 27, 2022 at 10:54 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@linaro.org> wrote: > >> > >> On 27/07/2022 11:05, Lad, Prabhakar wrote: > >>> Hi Krzysztof, > >>> > >>> Thank you for the review. > >>> > >>> On Wed, Jul 27, 2022 at 9:54 AM Krzysztof Kozlowski > >>> <krzysztof.kozlowski@linaro.org> wrote: > >>>> > >>>> On 26/07/2022 20:06, Lad Prabhakar wrote: > >>>>> Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. > >>>>> > >>>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > >>>>> --- > >>>>> .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ > >>>>> 1 file changed, 49 insertions(+) > >>>>> create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml > >>>>> > >>>>> diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml > >>>>> new file mode 100644 > >>>>> index 000000000000..f72f8aea6a82 > >>>>> --- /dev/null > >>>>> +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml > >>>>> @@ -0,0 +1,49 @@ > >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >>>>> +%YAML 1.2 > >>>>> +--- > >>>>> +$id: http://devicetree.org/schemas/riscv/renesas.yaml# > >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>>>> + > >>>>> +title: Renesas RZ/Five Platform Device Tree Bindings > >>>>> + > >>>>> +maintainers: > >>>>> + - Geert Uytterhoeven <geert+renesas@glider.be> > >>>>> + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > >>>>> + > >>>>> +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch > >>>>> +select: > >>>>> + not: > >>>>> + properties: > >>>>> + compatible: > >>>>> + contains: > >>>>> + items: > >>>> > >>>> I think you should rather ignore the RiscV SoCs, not specific board. > >>>> > >>> You mean to ignore ARM/64 SoCs? > >>> > >>> Agreed just the below enum, should do the trick. > >>> > >>> - enum: > >>> - renesas,r9a07g043u11 > >>> - renesas,r9a07g043u12 > >>> - renesas,r9a07g044c1 > >>> - renesas,r9a07g044c2 > >>> - renesas,r9a07g044l1 > >>> - renesas,r9a07g044l2 > >>> - renesas,r9a07g054l1 > >>> - renesas,r9a07g054l2 > >>> > >>> > >>>>> + - const: renesas,smarc-evk > >>>>> + - enum: > >>>>> + - renesas,r9a07g043u11 > >>>>> + - renesas,r9a07g043u12 > >>>>> + - renesas,r9a07g044c1 > >>>>> + - renesas,r9a07g044c2 > >>>>> + - renesas,r9a07g044l1 > >>>>> + - renesas,r9a07g044l2 > >>>>> + - renesas,r9a07g054l1 > >>>>> + - renesas,r9a07g054l2 > >>>>> + - enum: > >>>>> + - renesas,r9a07g043 > >>>>> + - renesas,r9a07g044 > >>>>> + - renesas,r9a07g054 > >>>> > >>>> Did you actually test that it works and properly matches? > >>>> > >>> Yes I have run the dtbs_check and dt_binding _check for ARM64 and > >>> RISC-V. Do you see any cases where it can fail? > >> > >> > >> Just remove the renesas,smarc-evk2 from > >> arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts. Do you see the > >> error? Not from this schema. The only error you will see is that no > >> matching schema was found. > >> > > I did run the dtbs_check test as per your suggestion (below is the > > log) and didn't see "no matching schema error" > > > > So you do not see any errors at all. Then it does not work, does it? > Right I reverted my changes I can see it complaining, dtb_check seems to have returned false positive in my case. What approach would you suggest to ignore the schema here? Cheers, Prabhakar
On 27/07/2022 13:37, Lad, Prabhakar wrote: >>>> >>> I did run the dtbs_check test as per your suggestion (below is the >>> log) and didn't see "no matching schema error" >>> >> >> So you do not see any errors at all. Then it does not work, does it? >> > Right I reverted my changes I can see it complaining, dtb_check seems > to have returned false positive in my case. > > What approach would you suggest to ignore the schema here? I don't think currently it would work with your approach. Instead, you should select here all SoCs which the schema should match. This leads to my previous concern - you use the same SoC compatible for two different architectures and different SoCs: ARMv8 and RISC-V. Best regards, Krzysztof
Hi, > Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > documentation for Renesas RZ/Five SoC and SMARC EVK > > On 27/07/2022 13:37, Lad, Prabhakar wrote: > >>>> > >>> I did run the dtbs_check test as per your suggestion (below is the > >>> log) and didn't see "no matching schema error" > >>> > >> > >> So you do not see any errors at all. Then it does not work, does it? > >> > > Right I reverted my changes I can see it complaining, dtb_check seems > > to have returned false positive in my case. > > > > What approach would you suggest to ignore the schema here? > > I don't think currently it would work with your approach. Instead, you > should select here all SoCs which the schema should match. > > This leads to my previous concern - you use the same SoC compatible for > two different architectures and different SoCs: ARMv8 and RISC-V. Or is it same SoC(R9A07G043) based on two different CPU architectures (ARMv8 and RISC-V) Using same SoM and Carrier board? Cheers, Biju
On 27/07/2022 14:21, Biju Das wrote: > Hi, > >> Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding >> documentation for Renesas RZ/Five SoC and SMARC EVK >> >> On 27/07/2022 13:37, Lad, Prabhakar wrote: >>>>>> >>>>> I did run the dtbs_check test as per your suggestion (below is the >>>>> log) and didn't see "no matching schema error" >>>>> >>>> >>>> So you do not see any errors at all. Then it does not work, does it? >>>> >>> Right I reverted my changes I can see it complaining, dtb_check seems >>> to have returned false positive in my case. >>> >>> What approach would you suggest to ignore the schema here? >> >> I don't think currently it would work with your approach. Instead, you >> should select here all SoCs which the schema should match. >> >> This leads to my previous concern - you use the same SoC compatible for >> two different architectures and different SoCs: ARMv8 and RISC-V. > > Or is it same SoC(R9A07G043) based on two different CPU architectures (ARMv8 and RISC-V) Then it is not the same SoC! Same means same, identical. CPU architecture is one of the major differences, which means it is not the same. > Using same SoM and Carrier board? It's like saying PC with x86 and ARMv8 board are the same because they both use same "PC chassis". Best regards, Krzysztof
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: 27 July 2022 13:37 > To: Biju Das <biju.das.jz@bp.renesas.com>; Lad, Prabhakar > <prabhakar.csengg@gmail.com> > Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>; > Geert Uytterhoeven <geert+renesas@glider.be>; Magnus Damm > <magnus.damm@gmail.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof > Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Paul Walmsley > <paul.walmsley@sifive.com>; Palmer Dabbelt <palmer@dabbelt.com>; Albert > Ou <aou@eecs.berkeley.edu>; Anup Patel <anup@brainfault.org>; Linux- > Renesas <linux-renesas-soc@vger.kernel.org>; open list:OPEN FIRMWARE AND > FLATTENED DEVICE TREE BINDINGS <devicetree@vger.kernel.org>; linux-riscv > <linux-riscv@lists.infradead.org>; LKML <linux-kernel@vger.kernel.org> > Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > documentation for Renesas RZ/Five SoC and SMARC EVK > > On 27/07/2022 14:21, Biju Das wrote: > > Hi, > > > >> Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > >> documentation for Renesas RZ/Five SoC and SMARC EVK > >> > >> On 27/07/2022 13:37, Lad, Prabhakar wrote: > >>>>>> > >>>>> I did run the dtbs_check test as per your suggestion (below is the > >>>>> log) and didn't see "no matching schema error" > >>>>> > >>>> > >>>> So you do not see any errors at all. Then it does not work, does > it? > >>>> > >>> Right I reverted my changes I can see it complaining, dtb_check > >>> seems to have returned false positive in my case. > >>> > >>> What approach would you suggest to ignore the schema here? > >> > >> I don't think currently it would work with your approach. Instead, > >> you should select here all SoCs which the schema should match. > >> > >> This leads to my previous concern - you use the same SoC compatible > >> for two different architectures and different SoCs: ARMv8 and RISC-V. > > > > Or is it same SoC(R9A07G043) based on two different CPU architectures > > (ARMv8 and RISC-V) > > Then it is not the same SoC! Same means same, identical. CPU > architecture is one of the major differences, which means it is not the > same. Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of differences for SoC based on ARMV8 and RISC-V which has separate compatible like r9a07g043u11 and r9a07g043f01? > > > Using same SoM and Carrier board? > > It's like saying PC with x86 and ARMv8 board are the same because they > both use same "PC chassis". What I meant is board based on Family SoC(R9A07G043) that is either based on ARMv8 or RISC-V cpu architecture. Cheers, Biju
On 27/07/2022 14:56, Biju Das wrote: >> >> Then it is not the same SoC! Same means same, identical. CPU >> architecture is one of the major differences, which means it is not the >> same. > > Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of > differences for SoC based on ARMV8 and RISC-V which has separate compatible like > r9a07g043u11 and r9a07g043f01? This does not answer the concern - it's not the same SoC. The most generic compatible denotes the most common part. I would argue that instruction set and architecture are the most important differences. None of ARMv8 SoCs (SoCs, not CPU cores) have "arm,armv8" compatible and you went even more - you combined two architectures in the most generic compatibles. > >> >>> Using same SoM and Carrier board? >> >> It's like saying PC with x86 and ARMv8 board are the same because they >> both use same "PC chassis". > > What I meant is board based on Family SoC(R9A07G043) that is either based on ARMv8 or > RISC-V cpu architecture. I don't see this related to the topic at all. What board do you use, does not matter. The board does not change the fact these SoCs have entirely different architecture - ARMv8 and RISC-V. Best regards, Krzysztof
On 27/07/2022 14:00, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 27/07/2022 14:56, Biju Das wrote: >>> >>> Then it is not the same SoC! Same means same, identical. CPU >>> architecture is one of the major differences, which means it is not the >>> same. >> >> Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of >> differences for SoC based on ARMV8 and RISC-V which has separate compatible like >> r9a07g043u11 and r9a07g043f01? > > This does not answer the concern - it's not the same SoC. The most > generic compatible denotes the most common part. I would argue that > instruction set and architecture are the most important differences. > None of ARMv8 SoCs (SoCs, not CPU cores) have "arm,armv8" compatible and > you went even more - you combined two architectures in the most generic > compatibles. I would have to agree with this. The most "core" part of the SoC is its architecture and while the peripheral IPs might be the same etc & the Renesas marketing team might have put them in the same "family", for the purposes of a device tree I don't see how having a common fallback makes sense. Conor.
On Wed, Jul 27, 2022 at 2:29 PM <Conor.Dooley@microchip.com> wrote: > > On 27/07/2022 14:00, Krzysztof Kozlowski wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > On 27/07/2022 14:56, Biju Das wrote: > >>> > >>> Then it is not the same SoC! Same means same, identical. CPU > >>> architecture is one of the major differences, which means it is not the > >>> same. > >> > >> Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of > >> differences for SoC based on ARMV8 and RISC-V which has separate compatible like > >> r9a07g043u11 and r9a07g043f01? > > > > This does not answer the concern - it's not the same SoC. The most > > generic compatible denotes the most common part. I would argue that > > instruction set and architecture are the most important differences. > > None of ARMv8 SoCs (SoCs, not CPU cores) have "arm,armv8" compatible and > > you went even more - you combined two architectures in the most generic > > compatibles. > > I would have to agree with this. The most "core" part of the SoC is > its architecture and while the peripheral IPs might be the same etc > & the Renesas marketing team might have put them in the same "family", > for the purposes of a device tree I don't see how having a common > fallback makes sense. > Agreed, I was following the same which we have done on the ARM64 schema. I am waiting on Geert's feedback on whether we should follow as Krzysztof suggested ie to have renesas,smarc-evk-r9a07g043f01 - for the board renesas,9a07g043f01 - for the SoC Cheers, Prabhakar
Hi Krzysztof, On Wed, Jul 27, 2022 at 2:37 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 27/07/2022 14:21, Biju Das wrote: > >> Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding > >> documentation for Renesas RZ/Five SoC and SMARC EVK > >> On 27/07/2022 13:37, Lad, Prabhakar wrote: > >>>>> I did run the dtbs_check test as per your suggestion (below is the > >>>>> log) and didn't see "no matching schema error" > >>>>> > >>>> > >>>> So you do not see any errors at all. Then it does not work, does it? > >>>> > >>> Right I reverted my changes I can see it complaining, dtb_check seems > >>> to have returned false positive in my case. > >>> > >>> What approach would you suggest to ignore the schema here? > >> > >> I don't think currently it would work with your approach. Instead, you > >> should select here all SoCs which the schema should match. > >> > >> This leads to my previous concern - you use the same SoC compatible for > >> two different architectures and different SoCs: ARMv8 and RISC-V. > > > > Or is it same SoC(R9A07G043) based on two different CPU architectures (ARMv8 and RISC-V) > > Then it is not the same SoC! Same means same, identical. CPU > architecture is one of the major differences, which means it is not the > same. > > > Using same SoM and Carrier board? > > It's like saying PC with x86 and ARMv8 board are the same because they > both use same "PC chassis". That's not a fair comparison: the "PC chassis" is passive, while the carrier board is an active PCB. So it is more akin to plugging any Intel LGA 1151 processor into any motherboard with an LGA 1151 socket. Do we have compatible values for all such possible combinations? ;-) The classic compatible scheme of an ordered list from most-specific to least-specific is not well-suited for this case of mere aggregation. That's why we have been decoupling board and SoC compatible values for a while, and identifying specific boards by a combination of a board-specific and an SoC-specific compatible value. New SoCs that are available with different core CPU families (and that are pin-compatible) are just the next step in the evolution.... At the DT validation level, I think the proper solution is to merge Documentation/devicetree/bindings/arm/renesas.yaml and Documentation/devicetree/bindings/riscv/renesas.yaml into a single file under Documentation/devicetree/bindings/soc/renesas/. What do other people think? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 11/08/2022 18:42, Geert Uytterhoeven wrote: > At the DT validation level, I think the proper solution is to > merge Documentation/devicetree/bindings/arm/renesas.yaml and > Documentation/devicetree/bindings/riscv/renesas.yaml into a single > file under Documentation/devicetree/bindings/soc/renesas/. > > What do other people think? I am ok with it. Best regards, Krzysztof
Hi Krzysztof and Geert, On Fri, Aug 12, 2022 at 7:23 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 11/08/2022 18:42, Geert Uytterhoeven wrote: > > At the DT validation level, I think the proper solution is to > > merge Documentation/devicetree/bindings/arm/renesas.yaml and > > Documentation/devicetree/bindings/riscv/renesas.yaml into a single > > file under Documentation/devicetree/bindings/soc/renesas/. > > > > What do other people think? > > I am ok with it. > Thanks, I'll move this to the soc folder in v2. Cheers, Prabhakar
On Thu, 11 Aug 2022 23:23:10 PDT (-0700), krzysztof.kozlowski@linaro.org wrote: > On 11/08/2022 18:42, Geert Uytterhoeven wrote: >> At the DT validation level, I think the proper solution is to >> merge Documentation/devicetree/bindings/arm/renesas.yaml and >> Documentation/devicetree/bindings/riscv/renesas.yaml into a single >> file under Documentation/devicetree/bindings/soc/renesas/. >> >> What do other people think? > > I am ok with it. Seems reasonable to me too, but I pretty much always err on the side of keeping SOC stuff split out from the RISC-V stuff. Just looking at Documentation/devicetree/bindings/riscv/, it's pretty much all SOC stuff -- should we just move everything but cpus.yaml over?
diff --git a/Documentation/devicetree/bindings/riscv/renesas.yaml b/Documentation/devicetree/bindings/riscv/renesas.yaml new file mode 100644 index 000000000000..f72f8aea6a82 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/renesas.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/renesas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/Five Platform Device Tree Bindings + +maintainers: + - Geert Uytterhoeven <geert+renesas@glider.be> + - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> + +# We want to ignore this schema if the board is SMARC EVK based on ARM64 arch +select: + not: + properties: + compatible: + contains: + items: + - const: renesas,smarc-evk + - enum: + - renesas,r9a07g043u11 + - renesas,r9a07g043u12 + - renesas,r9a07g044c1 + - renesas,r9a07g044c2 + - renesas,r9a07g044l1 + - renesas,r9a07g044l2 + - renesas,r9a07g054l1 + - renesas,r9a07g054l2 + - enum: + - renesas,r9a07g043 + - renesas,r9a07g044 + - renesas,r9a07g054 + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: RZ/Five (R9A07G043) + items: + - enum: + - renesas,smarc-evk # SMARC EVK + - const: renesas,r9a07g043f01 + - const: renesas,r9a07g043 + +additionalProperties: true + +...
Document Renesas RZ/Five (R9A07G043) SoC and SMARC EVK based on this SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- .../devicetree/bindings/riscv/renesas.yaml | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/riscv/renesas.yaml