diff mbox series

drm/i915/dg2: Add support for DC5 state

Message ID 20220728162623.28901-1-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dg2: Add support for DC5 state | expand

Commit Message

Srivatsa, Anusha July 28, 2022, 4:26 p.m. UTC
With the latest DMC in place, enabling DC5 on DG2.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tolakanahalli Pradeep, Madhumitha July 28, 2022, 7:24 p.m. UTC | #1
On Thu, 2022-07-28 at 09:26 -0700, Anusha Srivatsa wrote:
> With the latest DMC in place, enabling DC5 on DG2.
> 
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Madhumitha Tolakanahalli Pradeep
			<madhumitha.tolakanahalli.pradeep@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 13aaa3247a5a..3f84af6beff3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -908,7 +908,7 @@ static u32 get_allowed_dc_mask(const struct
> drm_i915_private *dev_priv,
>                 return 0;
>  
>         if (IS_DG2(dev_priv))
> -               max_dc = 0;
> +               max_dc = 1;
>         else if (IS_DG1(dev_priv))
>                 max_dc = 3;
>         else if (DISPLAY_VER(dev_priv) >= 12)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 13aaa3247a5a..3f84af6beff3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -908,7 +908,7 @@  static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 		return 0;
 
 	if (IS_DG2(dev_priv))
-		max_dc = 0;
+		max_dc = 1;
 	else if (IS_DG1(dev_priv))
 		max_dc = 3;
 	else if (DISPLAY_VER(dev_priv) >= 12)