| Message ID | 20220729082633.277240-2-frankja@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | s390x: PV fixups | expand |
Quoting Janosch Frank (2022-07-29 10:26:28) [...] > diff --git a/s390x/snippets/asm/snippet-pv-diag-500.S b/s390x/snippets/asm/snippet-pv-diag-500.S > index 8dd66bd9..f4d75388 100644 > --- a/s390x/snippets/asm/snippet-pv-diag-500.S > +++ b/s390x/snippets/asm/snippet-pv-diag-500.S > @@ -8,6 +8,7 @@ > * Janosch Frank <frankja@linux.ibm.com> > */ > #include <asm/asm-offsets.h> > +#include "macros.S" > .section .text > > /* Clean and pre-load registers that are used for diag 500 */ > @@ -21,10 +22,7 @@ lghi %r3, 3 > lghi %r4, 4 > > /* Let's jump to the next label on a PGM */ > -xgr %r5, %r5 > -stg %r5, GEN_LC_PGM_NEW_PSW So previously the PSW mask was zero and hence we had 24-bit addressing, no? Now, we have bits 31 and 32 one and hence 64 bit addressing. I guess 24-bit addressing is not appropriate here (or at least doesn't matter too much), so I guess this is intended, isn't it?
On 8/2/22 09:10, Nico Boehr wrote: > Quoting Janosch Frank (2022-07-29 10:26:28) > [...] >> diff --git a/s390x/snippets/asm/snippet-pv-diag-500.S b/s390x/snippets/asm/snippet-pv-diag-500.S >> index 8dd66bd9..f4d75388 100644 >> --- a/s390x/snippets/asm/snippet-pv-diag-500.S >> +++ b/s390x/snippets/asm/snippet-pv-diag-500.S >> @@ -8,6 +8,7 @@ >> * Janosch Frank <frankja@linux.ibm.com> >> */ >> #include <asm/asm-offsets.h> >> +#include "macros.S" >> .section .text >> >> /* Clean and pre-load registers that are used for diag 500 */ >> @@ -21,10 +22,7 @@ lghi %r3, 3 >> lghi %r4, 4 >> >> /* Let's jump to the next label on a PGM */ >> -xgr %r5, %r5 >> -stg %r5, GEN_LC_PGM_NEW_PSW > > So previously the PSW mask was zero and hence we had 24-bit addressing, no? Now, we have bits 31 and 32 one and hence 64 bit addressing. Yes Also the linker script patch will exchange the mask for an invalid one so we need to replace both the mask and the address. > > I guess 24-bit addressing is not appropriate here (or at least doesn't matter too much), so I guess this is intended, isn't it? Claudio complained about the addressing change so I moved it over to full 64 bit.
Quoting Janosch Frank (2022-08-02 09:56:12) > On 8/2/22 09:10, Nico Boehr wrote: > > Quoting Janosch Frank (2022-07-29 10:26:28) > > [...] > >> diff --git a/s390x/snippets/asm/snippet-pv-diag-500.S b/s390x/snippets/asm/snippet-pv-diag-500.S > >> index 8dd66bd9..f4d75388 100644 > >> --- a/s390x/snippets/asm/snippet-pv-diag-500.S > >> +++ b/s390x/snippets/asm/snippet-pv-diag-500.S > >> @@ -8,6 +8,7 @@ > >> * Janosch Frank <frankja@linux.ibm.com> > >> */ > >> #include <asm/asm-offsets.h> > >> +#include "macros.S" > >> .section .text > >> > >> /* Clean and pre-load registers that are used for diag 500 */ > >> @@ -21,10 +22,7 @@ lghi %r3, 3 > >> lghi %r4, 4 > >> > >> /* Let's jump to the next label on a PGM */ > >> -xgr %r5, %r5 > >> -stg %r5, GEN_LC_PGM_NEW_PSW > > > > So previously the PSW mask was zero and hence we had 24-bit addressing, no? Now, we have bits 31 and 32 one and hence 64 bit addressing. > > Yes > Also the linker script patch will exchange the mask for an invalid one > so we need to replace both the mask and the address. > > > > > I guess 24-bit addressing is not appropriate here (or at least doesn't matter too much), so I guess this is intended, isn't it? Allrighty, then: Reviewed-by: Nico Boehr <nrb@linux.ibm.com>
diff --git a/s390x/snippets/asm/macros.S b/s390x/snippets/asm/macros.S new file mode 100644 index 00000000..667fb6dc --- /dev/null +++ b/s390x/snippets/asm/macros.S @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Commonly used assembly macros + * + * Copyright (c) 2022 IBM Corp + * + * Authors: + * Janosch Frank <frankja@linux.ibm.com> + */ +#include <asm/asm-offsets.h> + +/* + * Writes a PSW to addr_psw, useful for exception PSWs in lowcore + * + * reg is the scratch register used for temporary storage, it's NOT restored + * The psw address part is defined via psw_new_addr + * The psw mask part is always 64 bit + */ +.macro SET_PSW_NEW_ADDR reg, psw_new_addr, addr_psw +larl \reg, psw_mask_64 +stg \reg, \addr_psw +larl \reg, \psw_new_addr +stg \reg, \addr_psw + 8 +.endm + +.section .rodata +psw_mask_64: + .quad 0x0000000180000000 diff --git a/s390x/snippets/asm/snippet-pv-diag-288.S b/s390x/snippets/asm/snippet-pv-diag-288.S index aaee3cd1..63f2113b 100644 --- a/s390x/snippets/asm/snippet-pv-diag-288.S +++ b/s390x/snippets/asm/snippet-pv-diag-288.S @@ -8,6 +8,7 @@ * Janosch Frank <frankja@linux.ibm.com> */ #include <asm/asm-offsets.h> +#include "macros.S" .section .text /* Clean and pre-load registers that are used for diag 288 */ @@ -19,8 +20,7 @@ lghi %r1, 2 lghi %r2, 3 /* Let's jump to the pgm exit label on a PGM */ -larl %r4, exit_pgm -stg %r4, GEN_LC_PGM_NEW_PSW + 8 +SET_PSW_NEW_ADDR 4, exit_pgm, GEN_LC_PGM_NEW_PSW /* Execute the diag288 */ diag %r0, %r2, 0x288 diff --git a/s390x/snippets/asm/snippet-pv-diag-500.S b/s390x/snippets/asm/snippet-pv-diag-500.S index 8dd66bd9..f4d75388 100644 --- a/s390x/snippets/asm/snippet-pv-diag-500.S +++ b/s390x/snippets/asm/snippet-pv-diag-500.S @@ -8,6 +8,7 @@ * Janosch Frank <frankja@linux.ibm.com> */ #include <asm/asm-offsets.h> +#include "macros.S" .section .text /* Clean and pre-load registers that are used for diag 500 */ @@ -21,10 +22,7 @@ lghi %r3, 3 lghi %r4, 4 /* Let's jump to the next label on a PGM */ -xgr %r5, %r5 -stg %r5, GEN_LC_PGM_NEW_PSW -larl %r5, next -stg %r5, GEN_LC_PGM_NEW_PSW + 8 +SET_PSW_NEW_ADDR 5, next, GEN_LC_PGM_NEW_PSW /* Execute the diag500 */ diag 0, 0, 0x500
Setting exception new PSWs is commonly needed so let's add a macro for that. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> --- s390x/snippets/asm/macros.S | 28 ++++++++++++++++++++++++ s390x/snippets/asm/snippet-pv-diag-288.S | 4 ++-- s390x/snippets/asm/snippet-pv-diag-500.S | 6 ++--- 3 files changed, 32 insertions(+), 6 deletions(-) create mode 100644 s390x/snippets/asm/macros.S