| Message ID | 20220801194448.29363-3-william.zhang@broadcom.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] ARM: dts: bcmbca: bcm63178: fix timer node cpu mask flag | expand |
On Mon, 1 Aug 2022 12:44:47 -0700, William Zhang <william.zhang@broadcom.com> wrote: > Add the missing gic registers and interrupts property to the gic node. > > Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178") > Signed-off-by: William Zhang <william.zhang@broadcom.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks! -- Florian
diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index 98ab10e1c81e..dba71fa53466 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -86,15 +86,17 @@ axi@81000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x81000000 0x4000>; + ranges = <0 0x81000000 0x8000>; gic: interrupt-controller@1000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; - #address-cells = <0>; interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>; reg = <0x1000 0x1000>, - <0x2000 0x2000>; + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; }; };
Add the missing gic registers and interrupts property to the gic node. Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178") Signed-off-by: William Zhang <william.zhang@broadcom.com> --- arch/arm/boot/dts/bcm63178.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)