Message ID | 20220817073635.29609-1-liweiwei@iscas.ac.cn (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] target/riscv: fix csr check for cycle{h}, instret{h}, time{h}, hpmcounter3-31{h} | expand |
On Wed, Aug 17, 2022 at 03:36:35PM +0800, Weiwei Li wrote: > - modify check for mcounteren to work in all less-privilege mode > - modify check for scounteren to work only when S mode is enabled > - distinguish the exception type raised by check for scounteren between U > and VU mode > > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> > --- > v2: > - Rebase on patches v13 for "Improve PMU support" > > target/riscv/csr.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/csr.c b/target/riscv/csr.c > index 2dcd4e5b2d..a6bf2ff964 100644 > --- a/target/riscv/csr.c > +++ b/target/riscv/csr.c > @@ -98,17 +98,22 @@ static RISCVException ctr(CPURISCVState *env, int csrno) > > skip_ext_pmu_check: > > - if (((env->priv == PRV_S) && (!get_field(env->mcounteren, ctr_mask))) || > - ((env->priv == PRV_U) && (!get_field(env->scounteren, ctr_mask)))) { > + if ((env->priv < PRV_M) && (!get_field(env->mcounteren, ctr_mask))) { I'd drop the unnecessary ()'s on both sides of the && > return RISCV_EXCP_ILLEGAL_INST; > } > > if (riscv_cpu_virt_enabled(env)) { > - if (!get_field(env->hcounteren, ctr_mask) && > - get_field(env->mcounteren, ctr_mask)) { > + if (!get_field(env->hcounteren, ctr_mask) || > + ((env->priv == PRV_U) && !get_field(env->scounteren, ctr_mask))) { () around env->priv == PRV_U can be dropped too > return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; > } > } > + > + if (riscv_has_ext(env, RVS) && (env->priv == PRV_U) && And here. Hmm, it seems a lot of env->priv checks in this file have unnecessary ()'s. Oh well, I like lisp. Thanks, drew > + !get_field(env->scounteren, ctr_mask)) { > + return RISCV_EXCP_ILLEGAL_INST; > + } > + > #endif > return RISCV_EXCP_NONE; > } > -- > 2.17.1 > >
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 2dcd4e5b2d..a6bf2ff964 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -98,17 +98,22 @@ static RISCVException ctr(CPURISCVState *env, int csrno) skip_ext_pmu_check: - if (((env->priv == PRV_S) && (!get_field(env->mcounteren, ctr_mask))) || - ((env->priv == PRV_U) && (!get_field(env->scounteren, ctr_mask)))) { + if ((env->priv < PRV_M) && (!get_field(env->mcounteren, ctr_mask))) { return RISCV_EXCP_ILLEGAL_INST; } if (riscv_cpu_virt_enabled(env)) { - if (!get_field(env->hcounteren, ctr_mask) && - get_field(env->mcounteren, ctr_mask)) { + if (!get_field(env->hcounteren, ctr_mask) || + ((env->priv == PRV_U) && !get_field(env->scounteren, ctr_mask))) { return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; } } + + if (riscv_has_ext(env, RVS) && (env->priv == PRV_U) && + !get_field(env->scounteren, ctr_mask)) { + return RISCV_EXCP_ILLEGAL_INST; + } + #endif return RISCV_EXCP_NONE; }