Message ID | AM6PR04MB592554C5B222B1AF221C5E2FE19D9@AM6PR04MB5925.eurprd04.prod.outlook.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | [V2,1/2] bindings: fsl-imx-sdma: Document 'HDMI Audio' transfer | expand |
Gentle ping... BR Joy Zou > -----Original Message----- > From: Joy Zou > Sent: 2022年8月2日 11:58 > To: vkoul@kernel.org > Cc: S.J. Wang <shengjiu.wang@nxp.com>; shawnguo@kernel.org; > s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; > dl-linux-imx <linux-imx@nxp.com>; dmaengine@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: FW: [PATCH V2 2/2] dmaengine: imx-sdma: support hdmi audio > > Gentle ping... > > BR > Joy Zou > > -----Original Message----- > From: Joy Zou > Sent: 2022年5月24日 16:05 > To: vkoul@kernel.org > Cc: S.J. Wang <shengjiu.wang@nxp.com>; shawnguo@kernel.org; > s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; > dl-linux-imx <linux-imx@nxp.com>; dmaengine@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: [PATCH V2 2/2] dmaengine: imx-sdma: support hdmi audio > > Add hdmi audio support in sdma. > > Signed-off-by: Joy Zou <joy.zou@nxp.com> > --- > Changes since v1: > moved data type to include/linux/dma/imx-dma.h > --- > drivers/dma/imx-sdma.c | 38 > +++++++++++++++++++++++++++++-------- > include/linux/dma/imx-dma.h | 1 + > 2 files changed, 31 insertions(+), 8 deletions(-) > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index > 8535018ee7a2..e9b8b2e9f7c9 100644 > --- a/drivers/dma/imx-sdma.c > +++ b/drivers/dma/imx-sdma.c > @@ -941,7 +941,10 @@ static irqreturn_t sdma_int_handler(int irq, void > *dev_id) > desc = sdmac->desc; > if (desc) { > if (sdmac->flags & IMX_DMA_SG_LOOP) { > - sdma_update_channel_loop(sdmac); > + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) > + sdma_update_channel_loop(sdmac); > + else > + vchan_cyclic_callback(&desc->vd); > } else { > mxc_sdma_handle_channel_normal(sdmac); > vchan_cookie_complete(&desc->vd); > @@ -1061,6 +1064,10 @@ static int sdma_get_pc(struct sdma_channel > *sdmac, > per_2_emi = sdma->script_addrs->sai_2_mcu_addr; > emi_2_per = sdma->script_addrs->mcu_2_sai_addr; > break; > + case IMX_DMATYPE_HDMI: > + emi_2_per = sdma->script_addrs->hdmi_dma_addr; > + sdmac->is_ram_script = true; > + break; > default: > dev_err(sdma->dev, "Unsupported transfer type %d\n", > peripheral_type); > @@ -1112,11 +1119,16 @@ static int sdma_load_context(struct > sdma_channel *sdmac) > /* Send by context the event mask,base address for peripheral > * and watermark level > */ > - context->gReg[0] = sdmac->event_mask[1]; > - context->gReg[1] = sdmac->event_mask[0]; > - context->gReg[2] = sdmac->per_addr; > - context->gReg[6] = sdmac->shp_addr; > - context->gReg[7] = sdmac->watermark_level; > + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { > + context->gReg[4] = sdmac->per_addr; > + context->gReg[6] = sdmac->shp_addr; > + } else { > + context->gReg[0] = sdmac->event_mask[1]; > + context->gReg[1] = sdmac->event_mask[0]; > + context->gReg[2] = sdmac->per_addr; > + context->gReg[6] = sdmac->shp_addr; > + context->gReg[7] = sdmac->watermark_level; > + } > > bd0->mode.command = C0_SETDM; > bd0->mode.status = BD_DONE | BD_WRAP | BD_EXTD; @@ -1488,7 > +1500,7 @@ static struct sdma_desc *sdma_transfer_init(struct > sdma_channel *sdmac, > desc->sdmac = sdmac; > desc->num_bd = bds; > > - if (sdma_alloc_bd(desc)) > + if (bds && sdma_alloc_bd(desc)) > goto err_desc_out; > > /* No slave_config called in MEMCPY case, so do here */ @@ -1653,13 > +1665,16 @@ static struct dma_async_tx_descriptor > *sdma_prep_dma_cyclic( { > struct sdma_channel *sdmac = to_sdma_chan(chan); > struct sdma_engine *sdma = sdmac->sdma; > - int num_periods = buf_len / period_len; > + int num_periods = 0; > int channel = sdmac->channel; > int i = 0, buf = 0; > struct sdma_desc *desc; > > dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); > > + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) > + num_periods = buf_len / period_len; > + > sdma_config_write(chan, &sdmac->slave_config, direction); > > desc = sdma_transfer_init(sdmac, direction, num_periods); @@ -1676,6 > +1691,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( > goto err_bd_out; > } > > + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) > + return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); > + > while (buf < buf_len) { > struct sdma_buffer_descriptor *bd = &desc->bd[i]; > int param; > @@ -1736,6 +1754,10 @@ static int sdma_config_write(struct dma_chan > *chan, > sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) & > SDMA_WATERMARK_LEVEL_HWML; > sdmac->word_size = dmaengine_cfg->dst_addr_width; > + } else if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { > + sdmac->per_address = dmaengine_cfg->dst_addr; > + sdmac->per_address2 = dmaengine_cfg->src_addr; > + sdmac->watermark_level = 0; > } else { > sdmac->per_address = dmaengine_cfg->dst_addr; > sdmac->watermark_level = dmaengine_cfg->dst_maxburst * diff --git > a/include/linux/dma/imx-dma.h b/include/linux/dma/imx-dma.h index > 8887762360d4..ef72e00fb55e 100644 > --- a/include/linux/dma/imx-dma.h > +++ b/include/linux/dma/imx-dma.h > @@ -40,6 +40,7 @@ enum sdma_peripheral_type { > IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ > IMX_DMATYPE_SAI, /* SAI */ > IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ > + IMX_DMATYPE_HDMI, /* HDMI Audio */ > }; > > enum imx_dma_prio { > -- > 2.25.1
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 8535018ee7a2..e9b8b2e9f7c9 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -941,7 +941,10 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id) desc = sdmac->desc; if (desc) { if (sdmac->flags & IMX_DMA_SG_LOOP) { - sdma_update_channel_loop(sdmac); + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) + sdma_update_channel_loop(sdmac); + else + vchan_cyclic_callback(&desc->vd); } else { mxc_sdma_handle_channel_normal(sdmac); vchan_cookie_complete(&desc->vd); @@ -1061,6 +1064,10 @@ static int sdma_get_pc(struct sdma_channel *sdmac, per_2_emi = sdma->script_addrs->sai_2_mcu_addr; emi_2_per = sdma->script_addrs->mcu_2_sai_addr; break; + case IMX_DMATYPE_HDMI: + emi_2_per = sdma->script_addrs->hdmi_dma_addr; + sdmac->is_ram_script = true; + break; default: dev_err(sdma->dev, "Unsupported transfer type %d\n", peripheral_type); @@ -1112,11 +1119,16 @@ static int sdma_load_context(struct sdma_channel *sdmac) /* Send by context the event mask,base address for peripheral * and watermark level */ - context->gReg[0] = sdmac->event_mask[1]; - context->gReg[1] = sdmac->event_mask[0]; - context->gReg[2] = sdmac->per_addr; - context->gReg[6] = sdmac->shp_addr; - context->gReg[7] = sdmac->watermark_level; + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { + context->gReg[4] = sdmac->per_addr; + context->gReg[6] = sdmac->shp_addr; + } else { + context->gReg[0] = sdmac->event_mask[1]; + context->gReg[1] = sdmac->event_mask[0]; + context->gReg[2] = sdmac->per_addr; + context->gReg[6] = sdmac->shp_addr; + context->gReg[7] = sdmac->watermark_level; + } bd0->mode.command = C0_SETDM; bd0->mode.status = BD_DONE | BD_WRAP | BD_EXTD; @@ -1488,7 +1500,7 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac, desc->sdmac = sdmac; desc->num_bd = bds; - if (sdma_alloc_bd(desc)) + if (bds && sdma_alloc_bd(desc)) goto err_desc_out; /* No slave_config called in MEMCPY case, so do here */ @@ -1653,13 +1665,16 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( { struct sdma_channel *sdmac = to_sdma_chan(chan); struct sdma_engine *sdma = sdmac->sdma; - int num_periods = buf_len / period_len; + int num_periods = 0; int channel = sdmac->channel; int i = 0, buf = 0; struct sdma_desc *desc; dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) + num_periods = buf_len / period_len; + sdma_config_write(chan, &sdmac->slave_config, direction); desc = sdma_transfer_init(sdmac, direction, num_periods); @@ -1676,6 +1691,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( goto err_bd_out; } + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) + return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); + while (buf < buf_len) { struct sdma_buffer_descriptor *bd = &desc->bd[i]; int param; @@ -1736,6 +1754,10 @@ static int sdma_config_write(struct dma_chan *chan, sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) & SDMA_WATERMARK_LEVEL_HWML; sdmac->word_size = dmaengine_cfg->dst_addr_width; + } else if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { + sdmac->per_address = dmaengine_cfg->dst_addr; + sdmac->per_address2 = dmaengine_cfg->src_addr; + sdmac->watermark_level = 0; } else { sdmac->per_address = dmaengine_cfg->dst_addr; sdmac->watermark_level = dmaengine_cfg->dst_maxburst * diff --git a/include/linux/dma/imx-dma.h b/include/linux/dma/imx-dma.h index 8887762360d4..ef72e00fb55e 100644 --- a/include/linux/dma/imx-dma.h +++ b/include/linux/dma/imx-dma.h @@ -40,6 +40,7 @@ enum sdma_peripheral_type { IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ IMX_DMATYPE_SAI, /* SAI */ IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ + IMX_DMATYPE_HDMI, /* HDMI Audio */ }; enum imx_dma_prio {