diff mbox series

drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning

Message ID 20220823202449.83727-1-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning | expand

Commit Message

Matt Roper Aug. 23, 2022, 8:24 p.m. UTC
Although register tuning settings are generally implemented via the
workaround infrastructure, it turns out that the DRAW_WATERMARK register
is not properly saved/restored by hardware around power events (i.e.,
RC6 entry) so updates to the value cannot be applied in the usual
manner.  New workaround Wa_16014892111 informs us that any tuning
updates to this register must instead be applied via an INDIRECT_CTX
batch buffer.  This will ensure that the necessary value is re-applied
when a context begins running, even if an RC6 entry had wiped the
register back to hardware defaults since the last context ran.

Fixes: 6dc85721df74 ("drm/i915/dg2: Add additional tuning settings")
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6642
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c         | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_workarounds.c |  2 --
 2 files changed, 21 insertions(+), 2 deletions(-)

Comments

Vivekanandan, Balasubramani Aug. 26, 2022, 2:52 p.m. UTC | #1
On 23.08.2022 13:24, Matt Roper wrote:
> Although register tuning settings are generally implemented via the
> workaround infrastructure, it turns out that the DRAW_WATERMARK register
> is not properly saved/restored by hardware around power events (i.e.,
> RC6 entry) so updates to the value cannot be applied in the usual
> manner.  New workaround Wa_16014892111 informs us that any tuning
> updates to this register must instead be applied via an INDIRECT_CTX
> batch buffer.  This will ensure that the necessary value is re-applied
> when a context begins running, even if an RC6 entry had wiped the
> register back to hardware defaults since the last context ran.
> 
> Fixes: 6dc85721df74 ("drm/i915/dg2: Add additional tuning settings")
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6642
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_lrc.c         | 21 +++++++++++++++++++++
>  drivers/gpu/drm/i915/gt/intel_workarounds.c |  2 --
>  2 files changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index eec73c66406c..070cec4ff8a4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1242,6 +1242,23 @@ dg2_emit_rcs_hang_wabb(const struct intel_context *ce, u32 *cs)
>  	return cs;
>  }
>  
> +/*
> + * The bspec's tuning guide asks us to program a vertical watermark value of
> + * 0x3FF.  However this register is not saved/restored properly by the
> + * hardware, so we're required to apply the desired value via INDIRECT_CTX
> + * batch buffer to ensure the value takes effect properly.  All other bits
> + * in this register should remain at 0 (the hardware default).
> + */
> +static u32 *
> +dg2_emit_draw_watermark_setting(u32 *cs)
> +{
> +	*cs++ = MI_LOAD_REGISTER_IMM(1);
> +	*cs++ = i915_mmio_reg_offset(DRAW_WATERMARK);
> +	*cs++ = REG_FIELD_PREP(VERT_WM_VAL, 0x3FF);
> +
> +	return cs;
> +}
> +
>  static u32 *
>  gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
>  {
> @@ -1263,6 +1280,10 @@ gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
>  	if (!HAS_FLAT_CCS(ce->engine->i915))
>  		cs = gen12_emit_aux_table_inv(cs, GEN12_GFX_CCS_AUX_NV);
>  
> +	/* Wa_16014892111 */
> +	if (IS_DG2(ce->engine->i915))
> +		cs = dg2_emit_draw_watermark_setting(cs);
> +
>  	return cs;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 31e129329fb0..3cdb8294e13f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2685,8 +2685,6 @@ add_render_compute_tuning_settings(struct drm_i915_private *i915,
>  	if (IS_DG2(i915)) {
>  		wa_write_or(wal, XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS);
>  		wa_write_clr_set(wal, RT_CTRL, STACKID_CTRL, STACKID_CTRL_512);
> -		wa_write_clr_set(wal, DRAW_WATERMARK, VERT_WM_VAL,
> -				 REG_FIELD_PREP(VERT_WM_VAL, 0x3FF));
>  
>  		/*
>  		 * This is also listed as Wa_22012654132 for certain DG2
> -- 
> 2.37.2
>
Matt Roper Aug. 26, 2022, 3:57 p.m. UTC | #2
On Thu, Aug 25, 2022 at 02:45:05AM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK tuning
> URL   : https://patchwork.freedesktop.org/series/107638/
> State : success
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_12017_full -> Patchwork_107638v1_full
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.

Applied to drm-intel-gt-next.  Thanks Bala for the review.


Matt

> 
>   
> 
> Participating hosts (12 -> 11)
> ------------------------------
> 
>   Missing    (1): shard-rkl 
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_107638v1_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_eio@in-flight-contexts-10ms:
>     - shard-glk:          [PASS][1] -> [TIMEOUT][2] ([i915#3063])
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-glk3/igt@gem_eio@in-flight-contexts-10ms.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-glk2/igt@gem_eio@in-flight-contexts-10ms.html
> 
>   * igt@gem_exec_balancer@parallel-out-fence:
>     - shard-iclb:         [PASS][3] -> [SKIP][4] ([i915#4525]) +1 similar issue
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb1/igt@gem_exec_balancer@parallel-out-fence.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb5/igt@gem_exec_balancer@parallel-out-fence.html
> 
>   * igt@gem_exec_fair@basic-none-share@rcs0:
>     - shard-iclb:         [PASS][5] -> [FAIL][6] ([i915#2842])
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
> 
>   * igt@gem_huc_copy@huc-copy:
>     - shard-apl:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@gem_huc_copy@huc-copy.html
> 
>   * igt@gem_lmem_swapping@parallel-random-engines:
>     - shard-kbl:          NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl4/igt@gem_lmem_swapping@parallel-random-engines.html
> 
>   * igt@i915_pm_dc@dc6-psr:
>     - shard-iclb:         [PASS][9] -> [FAIL][10] ([i915#454])
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
> 
>   * igt@i915_selftest@live@hangcheck:
>     - shard-snb:          [PASS][11] -> [INCOMPLETE][12] ([i915#3921])
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-snb5/igt@i915_selftest@live@hangcheck.html
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-snb5/igt@i915_selftest@live@hangcheck.html
> 
>   * igt@i915_suspend@fence-restore-untiled:
>     - shard-apl:          [PASS][13] -> [DMESG-WARN][14] ([i915#180])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-apl1/igt@i915_suspend@fence-restore-untiled.html
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
> 
>   * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs:
>     - shard-kbl:          NOTRUN -> [SKIP][15] ([fdo#109271]) +57 similar issues
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs.html
> 
>   * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
>     - shard-kbl:          NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3886]) +4 similar issues
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl4/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
> 
>   * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
>     - shard-apl:          NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#3886])
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
> 
>   * igt@kms_chamelium@dp-crc-single:
>     - shard-apl:          NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +1 similar issue
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@kms_chamelium@dp-crc-single.html
> 
>   * igt@kms_chamelium@dp-hpd-enable-disable-mode:
>     - shard-kbl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +3 similar issues
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl4/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
> 
>   * igt@kms_chamelium@vga-hpd-enable-disable-mode:
>     - shard-glk:          NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-glk5/igt@kms_chamelium@vga-hpd-enable-disable-mode.html
> 
>   * igt@kms_content_protection@srm:
>     - shard-kbl:          NOTRUN -> [TIMEOUT][21] ([i915#1319] / [i915#6637])
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@kms_content_protection@srm.html
> 
>   * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode:
>     - shard-iclb:         NOTRUN -> [SKIP][22] ([i915#2672] / [i915#3555])
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling@pipe-a-default-mode.html
> 
>   * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-default-mode:
>     - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#2672]) +1 similar issue
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-default-mode.html
> 
>   * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1:
>     - shard-apl:          NOTRUN -> [INCOMPLETE][24] ([i915#6598])
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
> 
>   * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-dp-1:
>     - shard-apl:          NOTRUN -> [SKIP][25] ([fdo#109271]) +25 similar issues
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-dp-1.html
> 
>   * igt@kms_vblank@pipe-c-ts-continuation-suspend:
>     - shard-kbl:          [PASS][26] -> [DMESG-WARN][27] ([i915#180])
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-kbl1/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
> 
>   * igt@sysfs_clients@split-50:
>     - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2994])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@sysfs_clients@split-50.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@feature_discovery@psr2:
>     - shard-iclb:         [SKIP][29] ([i915#658]) -> [PASS][30]
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb1/igt@feature_discovery@psr2.html
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb2/igt@feature_discovery@psr2.html
> 
>   * igt@gem_eio@reset-stress:
>     - shard-tglb:         [FAIL][31] ([i915#5784]) -> [PASS][32]
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-tglb5/igt@gem_eio@reset-stress.html
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-tglb7/igt@gem_eio@reset-stress.html
> 
>   * igt@gem_exec_fair@basic-deadline:
>     - shard-kbl:          [FAIL][33] ([i915#2846]) -> [PASS][34]
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@gem_exec_fair@basic-deadline.html
> 
>   * igt@gem_exec_fair@basic-none-solo@rcs0:
>     - shard-apl:          [FAIL][35] ([i915#2842]) -> [PASS][36] +1 similar issue
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
> 
>   * igt@gem_exec_fair@basic-pace-solo@rcs0:
>     - shard-kbl:          [FAIL][37] ([i915#2842]) -> [PASS][38] +1 similar issue
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-kbl1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
> 
>   * igt@gem_exec_suspend@basic-s3@smem:
>     - shard-apl:          [DMESG-WARN][39] ([i915#180]) -> [PASS][40]
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-apl6/igt@gem_exec_suspend@basic-s3@smem.html
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-apl3/igt@gem_exec_suspend@basic-s3@smem.html
> 
>   * igt@gen9_exec_parse@allowed-all:
>     - shard-glk:          [DMESG-WARN][41] ([i915#5566] / [i915#716]) -> [PASS][42]
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-glk5/igt@gen9_exec_parse@allowed-all.html
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-glk5/igt@gen9_exec_parse@allowed-all.html
> 
>   * igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1:
>     - shard-kbl:          [DMESG-WARN][43] ([i915#180]) -> [PASS][44] +2 similar issues
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-kbl7/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl4/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
> 
>   * igt@kms_vblank@pipe-b-ts-continuation-suspend:
>     - shard-kbl:          [INCOMPLETE][45] ([i915#3614] / [i915#4939] / [i915#6598]) -> [PASS][46]
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-kbl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
> 
>   * igt@kms_vblank@pipe-b-wait-idle-hang:
>     - shard-snb:          [SKIP][47] ([fdo#109271]) -> [PASS][48]
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-snb2/igt@kms_vblank@pipe-b-wait-idle-hang.html
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-snb6/igt@kms_vblank@pipe-b-wait-idle-hang.html
> 
>   * igt@testdisplay:
>     - {shard-tglu}:       [DMESG-WARN][49] ([i915#4941]) -> [PASS][50]
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-tglu-3/igt@testdisplay.html
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-tglu-1/igt@testdisplay.html
> 
>   
> #### Warnings ####
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-tglb:         [TIMEOUT][51] ([i915#3063]) -> [FAIL][52] ([i915#5784])
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-tglb7/igt@gem_eio@unwedge-stress.html
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-tglb3/igt@gem_eio@unwedge-stress.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
>     - shard-iclb:         [INCOMPLETE][53] ([i915#6598]) -> [INCOMPLETE][54] ([i915#1982] / [i915#6598])
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
> 
>   * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
>     - shard-iclb:         [SKIP][55] ([i915#2920]) -> [SKIP][56] ([i915#658])
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12017/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/shard-iclb5/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
>   [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
>   [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
>   [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
>   [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
>   [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
>   [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
>   [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
>   [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
>   [i915#3614]: https://gitlab.freedesktop.org/drm/intel/issues/3614
>   [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
>   [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
>   [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
>   [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
>   [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
>   [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
>   [i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939
>   [i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941
>   [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
>   [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
>   [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
>   [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
>   [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
>   [i915#6637]: https://gitlab.freedesktop.org/drm/intel/issues/6637
>   [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_12017 -> Patchwork_107638v1
> 
>   CI-20190529: 20190529
>   CI_DRM_12017: d09b6a64bd55b1c8c7baada7537621015f0cfd71 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_6634: e01fe99f00692864b709253638c809231d1fb333 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_107638v1: d09b6a64bd55b1c8c7baada7537621015f0cfd71 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107638v1/index.html
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index eec73c66406c..070cec4ff8a4 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1242,6 +1242,23 @@  dg2_emit_rcs_hang_wabb(const struct intel_context *ce, u32 *cs)
 	return cs;
 }
 
+/*
+ * The bspec's tuning guide asks us to program a vertical watermark value of
+ * 0x3FF.  However this register is not saved/restored properly by the
+ * hardware, so we're required to apply the desired value via INDIRECT_CTX
+ * batch buffer to ensure the value takes effect properly.  All other bits
+ * in this register should remain at 0 (the hardware default).
+ */
+static u32 *
+dg2_emit_draw_watermark_setting(u32 *cs)
+{
+	*cs++ = MI_LOAD_REGISTER_IMM(1);
+	*cs++ = i915_mmio_reg_offset(DRAW_WATERMARK);
+	*cs++ = REG_FIELD_PREP(VERT_WM_VAL, 0x3FF);
+
+	return cs;
+}
+
 static u32 *
 gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
 {
@@ -1263,6 +1280,10 @@  gen12_emit_indirect_ctx_rcs(const struct intel_context *ce, u32 *cs)
 	if (!HAS_FLAT_CCS(ce->engine->i915))
 		cs = gen12_emit_aux_table_inv(cs, GEN12_GFX_CCS_AUX_NV);
 
+	/* Wa_16014892111 */
+	if (IS_DG2(ce->engine->i915))
+		cs = dg2_emit_draw_watermark_setting(cs);
+
 	return cs;
 }
 
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 31e129329fb0..3cdb8294e13f 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2685,8 +2685,6 @@  add_render_compute_tuning_settings(struct drm_i915_private *i915,
 	if (IS_DG2(i915)) {
 		wa_write_or(wal, XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS);
 		wa_write_clr_set(wal, RT_CTRL, STACKID_CTRL, STACKID_CTRL_512);
-		wa_write_clr_set(wal, DRAW_WATERMARK, VERT_WM_VAL,
-				 REG_FIELD_PREP(VERT_WM_VAL, 0x3FF));
 
 		/*
 		 * This is also listed as Wa_22012654132 for certain DG2