diff mbox series

[net-next,v2] net: phy: micrel: Make the GPIO to be non-exclusive

Message ID 20220825201447.1444396-1-horatiu.vultur@microchip.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series [net-next,v2] net: phy: micrel: Make the GPIO to be non-exclusive | expand

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Context Check Description
netdev/tree_selection success Clearly marked for net-next
netdev/fixes_present success Fixes tag not required for -next series
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netdev/cover_letter success Single patches do not need cover letters
netdev/patch_count success Link
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/cc_maintainers success CCed 9 of 9 maintainers
netdev/build_clang success Errors and warnings before: 0 this patch: 0
netdev/module_param success Was 0 now: 0
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success Fixes tag looks correct
netdev/build_allmodconfig_warn success Errors and warnings before: 0 this patch: 0
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 19 lines checked
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0

Commit Message

Horatiu Vultur Aug. 25, 2022, 8:14 p.m. UTC
The same GPIO line can be shared by multiple phys for the coma mode pin.
If that is the case then, all the other phys that share the same line
will failed to be probed because the access to the gpio line is not
non-exclusive.
Fix this by making access to the gpio line to be nonexclusive using flag
GPIOD_FLAGS_BIT_NONEXCLUSIVE. This allows all the other PHYs to be
probed.

Fixes: 738871b09250ee ("net: phy: micrel: add coma mode GPIO")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
v1->v2:
- add comment describing that there should not be anyone putting back
  the phy in coma mode.
---
 drivers/net/phy/micrel.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Andrew Lunn Aug. 25, 2022, 8:16 p.m. UTC | #1
On Thu, Aug 25, 2022 at 10:14:47PM +0200, Horatiu Vultur wrote:
> The same GPIO line can be shared by multiple phys for the coma mode pin.
> If that is the case then, all the other phys that share the same line
> will failed to be probed because the access to the gpio line is not
> non-exclusive.
> Fix this by making access to the gpio line to be nonexclusive using flag
> GPIOD_FLAGS_BIT_NONEXCLUSIVE. This allows all the other PHYs to be
> probed.
> 
> Fixes: 738871b09250ee ("net: phy: micrel: add coma mode GPIO")
> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew
Jakub Kicinski Aug. 27, 2022, 1:37 a.m. UTC | #2
On Thu, 25 Aug 2022 22:16:31 +0200 Andrew Lunn wrote:
> On Thu, Aug 25, 2022 at 10:14:47PM +0200, Horatiu Vultur wrote:
> > The same GPIO line can be shared by multiple phys for the coma mode pin.
> > If that is the case then, all the other phys that share the same line
> > will failed to be probed because the access to the gpio line is not
> > non-exclusive.
> > Fix this by making access to the gpio line to be nonexclusive using flag
> > GPIOD_FLAGS_BIT_NONEXCLUSIVE. This allows all the other PHYs to be
> > probed.
> > 
> > Fixes: 738871b09250ee ("net: phy: micrel: add coma mode GPIO")
> > Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>  
> 
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>

The tree name switch in the subject compared to v1 is unintentional?
Horatiu Vultur Aug. 27, 2022, 6:58 a.m. UTC | #3
The 08/26/2022 18:37, Jakub Kicinski wrote:

Hi Jakub,

> 
> On Thu, 25 Aug 2022 22:16:31 +0200 Andrew Lunn wrote:
> > On Thu, Aug 25, 2022 at 10:14:47PM +0200, Horatiu Vultur wrote:
> > > The same GPIO line can be shared by multiple phys for the coma mode pin.
> > > If that is the case then, all the other phys that share the same line
> > > will failed to be probed because the access to the gpio line is not
> > > non-exclusive.
> > > Fix this by making access to the gpio line to be nonexclusive using flag
> > > GPIOD_FLAGS_BIT_NONEXCLUSIVE. This allows all the other PHYs to be
> > > probed.
> > >
> > > Fixes: 738871b09250ee ("net: phy: micrel: add coma mode GPIO")
> > > Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
> >
> > Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> 
> The tree name switch in the subject compared to v1 is unintentional?

Yes I have switch it by mistake.
It should be net. I can send a new version if it is needed.
diff mbox series

Patch

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index e78d0bf69bc3..6f52b4fb6888 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -2873,12 +2873,18 @@  static int lan8814_config_init(struct phy_device *phydev)
 	return 0;
 }
 
+/* It is expected that there will not be any 'lan8814_take_coma_mode'
+ * function called in suspend. Because the GPIO line can be shared, so if one of
+ * the phys goes back in coma mode, then all the other PHYs will go, which is
+ * wrong.
+ */
 static int lan8814_release_coma_mode(struct phy_device *phydev)
 {
 	struct gpio_desc *gpiod;
 
 	gpiod = devm_gpiod_get_optional(&phydev->mdio.dev, "coma-mode",
-					GPIOD_OUT_HIGH_OPEN_DRAIN);
+					GPIOD_OUT_HIGH_OPEN_DRAIN |
+					GPIOD_FLAGS_BIT_NONEXCLUSIVE);
 	if (IS_ERR(gpiod))
 		return PTR_ERR(gpiod);