Message ID | 20220711085743.10128-2-j-choudhary@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Enable SA2UL support on AM64X | expand |
Jayesh Choudhary <j-choudhary@ti.com> writes: > From: Suman Anna <s-anna@ti.com> > > Add the address space for the SA2UL in MAIN domain to the ranges property > of the cbass_main interconnect node so that the addresses within the > corresponding sram nodes and its children can be translated properly by > the relevant OF address API. > > Signed-off-by: Suman Anna <s-anna@ti.com> > Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am64.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi > index 016dd8511ca6..c858725133af 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi > @@ -82,6 +82,7 @@ > <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */ > <0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */ > <0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */ > + <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */ > <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */ > <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ > <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */ Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index 016dd8511ca6..c858725133af 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -82,6 +82,7 @@ <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */ <0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */ <0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */ + <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */ <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */ <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */