diff mbox series

[v3,07/19] hwmon: (mr75203) enable polling for all VM channels

Message ID 20220830192212.28570-8-farbere@amazon.com (mailing list archive)
State Changes Requested
Headers show
Series Variety of fixes and new features for mr75203 driver | expand

Commit Message

Eliav Farber Aug. 30, 2022, 7:22 p.m. UTC
Configure ip-polling register to enable polling for all voltage monitor
channels.
This enables reading the voltage values for all inputs other than just
input 0.

Signed-off-by: Eliav Farber <farbere@amazon.com>
---
V3 -> V2:
- Move configuration of ip-polling register from previous patch to a
  separate commit.

 drivers/hwmon/mr75203.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Andy Shevchenko Aug. 31, 2022, 11:21 a.m. UTC | #1
On Tue, Aug 30, 2022 at 07:22:00PM +0000, Eliav Farber wrote:
> Configure ip-polling register to enable polling for all voltage monitor
> channels.
> This enables reading the voltage values for all inputs other than just
> input 0.

...

> +		val = GENMASK(pvt->c_num - 1, 0) | VM_CH_INIT |

I believe in this case (BIT(pvt->c_num) - 1) is better, but not sure
if c_num can be 32.

> +		      IP_POLL << SDIF_ADDR_SFT |
> +		      SDIF_WRN_W | SDIF_PROG;
Eliav Farber Aug. 31, 2022, 11:55 a.m. UTC | #2
On 8/31/2022 2:21 PM, Andy Shevchenko wrote:
> On Tue, Aug 30, 2022 at 07:22:00PM +0000, Eliav Farber wrote:
>> Configure ip-polling register to enable polling for all voltage monitor
>> channels.
>> This enables reading the voltage values for all inputs other than just
>> input 0.
>
> ...
>
>> +             val = GENMASK(pvt->c_num - 1, 0) | VM_CH_INIT |
>
> I believe in this case (BIT(pvt->c_num) - 1) is better, but not sure
> if c_num can be 32. 
c_num can't be 32.
I fix it in v4.

--
Thanks, Eliav
diff mbox series

Patch

diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c
index 639f5a300170..f561806c400d 100644
--- a/drivers/hwmon/mr75203.c
+++ b/drivers/hwmon/mr75203.c
@@ -388,6 +388,20 @@  static int pvt_init(struct pvt_device *pvt)
 		if (ret)
 			return ret;
 
+		val = GENMASK(pvt->c_num - 1, 0) | VM_CH_INIT |
+		      IP_POLL << SDIF_ADDR_SFT |
+		      SDIF_WRN_W | SDIF_PROG;
+		ret = regmap_write(v_map, SDIF_W, val);
+		if (ret < 0)
+			return ret;
+
+		ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
+					       val, !(val & SDIF_BUSY),
+					       PVT_POLL_DELAY_US,
+					       PVT_POLL_TIMEOUT_US);
+		if (ret)
+			return ret;
+
 		val = CFG1_VOL_MEAS_MODE | CFG1_PARALLEL_OUT |
 		      CFG1_14_BIT | IP_CFG << SDIF_ADDR_SFT |
 		      SDIF_WRN_W | SDIF_PROG;