| Message ID | 20220905105329.41455-1-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: consider HAS_FLAT_CCS() in needs_ccs_pages | expand |
LGTM Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> On 9/5/2022 12:53 PM, Matthew Auld wrote: > Just move the HAS_FLAT_CCS() check into needs_ccs_pages. This also then > fixes i915_ttm_memcpy_allowed() which was incorrectly reporting true on > DG1, even though it doesn't have small-BAR or flat-CCS. > > References: https://gitlab.freedesktop.org/drm/intel/-/issues/6605 > Fixes: efeb3caf4341 ("drm/i915/ttm: disallow CPU fallback mode for ccs pages") > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Nirmoy Das <nirmoy.das@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_object.c | 3 +++ > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 +- > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c > index 389e9f157ca5..85482a04d158 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > @@ -723,6 +723,9 @@ bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj) > bool lmem_placement = false; > int i; > > + if (!HAS_FLAT_CCS(to_i915(obj->base.dev))) > + return false; > + > for (i = 0; i < obj->mm.n_placements; i++) { > /* Compression is not allowed for the objects with smem placement */ > if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM) > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > index bc9c432edffe..f64a3deb12fc 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > @@ -297,7 +297,7 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo, > i915_tt->is_shmem = true; > } > > - if (HAS_FLAT_CCS(i915) && i915_gem_object_needs_ccs_pages(obj)) > + if (i915_gem_object_needs_ccs_pages(obj)) > ccs_pages = DIV_ROUND_UP(DIV_ROUND_UP(bo->base.size, > NUM_BYTES_PER_CCS_BYTE), > PAGE_SIZE);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 389e9f157ca5..85482a04d158 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -723,6 +723,9 @@ bool i915_gem_object_needs_ccs_pages(struct drm_i915_gem_object *obj) bool lmem_placement = false; int i; + if (!HAS_FLAT_CCS(to_i915(obj->base.dev))) + return false; + for (i = 0; i < obj->mm.n_placements; i++) { /* Compression is not allowed for the objects with smem placement */ if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index bc9c432edffe..f64a3deb12fc 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -297,7 +297,7 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo, i915_tt->is_shmem = true; } - if (HAS_FLAT_CCS(i915) && i915_gem_object_needs_ccs_pages(obj)) + if (i915_gem_object_needs_ccs_pages(obj)) ccs_pages = DIV_ROUND_UP(DIV_ROUND_UP(bo->base.size, NUM_BYTES_PER_CCS_BYTE), PAGE_SIZE);
Just move the HAS_FLAT_CCS() check into needs_ccs_pages. This also then fixes i915_ttm_memcpy_allowed() which was incorrectly reporting true on DG1, even though it doesn't have small-BAR or flat-CCS. References: https://gitlab.freedesktop.org/drm/intel/-/issues/6605 Fixes: efeb3caf4341 ("drm/i915/ttm: disallow CPU fallback mode for ccs pages") Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Nirmoy Das <nirmoy.das@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 3 +++ drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-)