Message ID | 20220906035423.634617-1-guoren@kernel.org (mailing list archive) |
---|---|
Headers | show |
Series | riscv: Add GENERIC_ENTRY, irq stack support | expand |
On 06/09/2022 04:54, guoren@kernel.org wrote: > From: Guo Ren <guoren@linux.alibaba.com> > > The patches convert riscv to use the generic entry infrastructure from > kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to > prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK > feature for the IRQ_STACKS config. You can try it directly with [1]. Hey Guo Ren, I applied this patchset to v6.0-rc4 & ran into a build error: /stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name la a3, ((1 << (12)) << (2 + 0)) ^ CC arch/riscv/kernel/process.o make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 make[5]: *** Waiting for unfinished jobs.... Thanks, Conor. > > [1] https://github.com/guoren83/linux/tree/generic_entry_v3 > > V3: > - Fixup CONFIG_COMPAT=n compile error > - Add THREAD_SIZE_ORDER config > - Optimize elf_kexec.c warning fixup > - Add static to irq_stack_ptr definition > > V2: > Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ > - Fixup compile error by include "riscv: ptrace: Remove duplicate > operation" > - Fixup compile warning > Reported-by: kernel test robot <lkp@intel.com> > - Add test repo link in cover letter > > V1: > Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ > > Guo Ren (7): > riscv: elf_kexec: Fixup compile warning > riscv: compat_syscall_table: Fixup compile warning > riscv: ptrace: Remove duplicate operation > riscv: convert to generic entry > riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK > riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK > riscv: Add config of thread stack size > > arch/riscv/Kconfig | 19 ++ > arch/riscv/include/asm/csr.h | 1 - > arch/riscv/include/asm/entry-common.h | 8 + > arch/riscv/include/asm/irq.h | 3 + > arch/riscv/include/asm/ptrace.h | 10 +- > arch/riscv/include/asm/stacktrace.h | 5 + > arch/riscv/include/asm/syscall.h | 6 + > arch/riscv/include/asm/thread_info.h | 19 +- > arch/riscv/include/asm/vmap_stack.h | 28 +++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/elf_kexec.c | 2 +- > arch/riscv/kernel/entry.S | 255 +++++--------------------- > arch/riscv/kernel/irq.c | 75 ++++++++ > arch/riscv/kernel/ptrace.c | 41 ----- > arch/riscv/kernel/signal.c | 21 +-- > arch/riscv/kernel/sys_riscv.c | 27 +++ > arch/riscv/kernel/traps.c | 11 ++ > arch/riscv/mm/fault.c | 12 +- > 18 files changed, 259 insertions(+), 285 deletions(-) > create mode 100644 arch/riscv/include/asm/entry-common.h > create mode 100644 arch/riscv/include/asm/vmap_stack.h >
On Wed, Sep 7, 2022 at 1:42 AM <Conor.Dooley@microchip.com> wrote: > > On 06/09/2022 04:54, guoren@kernel.org wrote: > > From: Guo Ren <guoren@linux.alibaba.com> > > > > The patches convert riscv to use the generic entry infrastructure from > > kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to > > prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK > > feature for the IRQ_STACKS config. You can try it directly with [1]. > > Hey Guo Ren, > I applied this patchset to v6.0-rc4 & ran into a build error: > /stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name > la a3, ((1 << (12)) << (2 + 0)) Yes, please try: - la a3, IRQ_STACK_SIZE + li a3, IRQ_STACK_SIZE la is for the symbol, not immediate. But why does my toolchain not report the error? ➜ linux git:(generic_entry_v3) make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g O=../build-riscv/ -kj62 all -kj ➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v Using built-in specs. COLLECT_GCC=riscv64-unknown-linux-gnu-gcc COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper Target: riscv64-unknown-linux-gnu Configured with: /home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 --with-system-zlib --enable-shared --enable-tls --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp --disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap --src=.././riscv-gcc --enable-multilib --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket --with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' 'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' Thread model: posix Supported LTO compression algorithms: zlib gcc version 11.1.0 (g5964b5cd7272) > ^ > CC arch/riscv/kernel/process.o > make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 > make[5]: *** Waiting for unfinished jobs.... > > Thanks, > Conor. > > > > [1] https://github.com/guoren83/linux/tree/generic_entry_v3 > > > > V3: > > - Fixup CONFIG_COMPAT=n compile error > > - Add THREAD_SIZE_ORDER config > > - Optimize elf_kexec.c warning fixup > > - Add static to irq_stack_ptr definition > > > > V2: > > Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ > > - Fixup compile error by include "riscv: ptrace: Remove duplicate > > operation" > > - Fixup compile warning > > Reported-by: kernel test robot <lkp@intel.com> > > - Add test repo link in cover letter > > > > V1: > > Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ > > > > Guo Ren (7): > > riscv: elf_kexec: Fixup compile warning > > riscv: compat_syscall_table: Fixup compile warning > > riscv: ptrace: Remove duplicate operation > > riscv: convert to generic entry > > riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK > > riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK > > riscv: Add config of thread stack size > > > > arch/riscv/Kconfig | 19 ++ > > arch/riscv/include/asm/csr.h | 1 - > > arch/riscv/include/asm/entry-common.h | 8 + > > arch/riscv/include/asm/irq.h | 3 + > > arch/riscv/include/asm/ptrace.h | 10 +- > > arch/riscv/include/asm/stacktrace.h | 5 + > > arch/riscv/include/asm/syscall.h | 6 + > > arch/riscv/include/asm/thread_info.h | 19 +- > > arch/riscv/include/asm/vmap_stack.h | 28 +++ > > arch/riscv/kernel/Makefile | 1 + > > arch/riscv/kernel/elf_kexec.c | 2 +- > > arch/riscv/kernel/entry.S | 255 +++++--------------------- > > arch/riscv/kernel/irq.c | 75 ++++++++ > > arch/riscv/kernel/ptrace.c | 41 ----- > > arch/riscv/kernel/signal.c | 21 +-- > > arch/riscv/kernel/sys_riscv.c | 27 +++ > > arch/riscv/kernel/traps.c | 11 ++ > > arch/riscv/mm/fault.c | 12 +- > > 18 files changed, 259 insertions(+), 285 deletions(-) > > create mode 100644 arch/riscv/include/asm/entry-common.h > > create mode 100644 arch/riscv/include/asm/vmap_stack.h > >
Hi Conor, I've found the root cause, you are using llvm: $ grep "bare sym" llvm -rn |grep RISCV llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1296: return Error(ErrorLoc, "operand must be a bare symbol name"); llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1304: return Error(ErrorLoc, "operand must be a bare symbol name"); That means we could fix up Binutils with a warning at least. Thx for pointing it out. On Wed, Sep 7, 2022 at 8:54 AM Guo Ren <guoren@kernel.org> wrote: > > On Wed, Sep 7, 2022 at 1:42 AM <Conor.Dooley@microchip.com> wrote: > > > > On 06/09/2022 04:54, guoren@kernel.org wrote: > > > From: Guo Ren <guoren@linux.alibaba.com> > > > > > > The patches convert riscv to use the generic entry infrastructure from > > > kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to > > > prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK > > > feature for the IRQ_STACKS config. You can try it directly with [1]. > > > > Hey Guo Ren, > > I applied this patchset to v6.0-rc4 & ran into a build error: > > /stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name > > la a3, ((1 << (12)) << (2 + 0)) > Yes, please try: > - la a3, IRQ_STACK_SIZE > + li a3, IRQ_STACK_SIZE > > la is for the symbol, not immediate. But why does my toolchain not > report the error? > > ➜ linux git:(generic_entry_v3) make ARCH=riscv > CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g > O=../build-riscv/ -kj62 all -kj > ➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v > Using built-in specs. > COLLECT_GCC=riscv64-unknown-linux-gnu-gcc > COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper > Target: riscv64-unknown-linux-gnu > Configured with: > /home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure > --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv > --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 > --with-system-zlib --enable-shared --enable-tls > --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp > --disable-libquadmath --disable-libsanitizer --disable-nls > --disable-bootstrap --src=.././riscv-gcc --enable-multilib > --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket > --with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' > 'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' > Thread model: posix > Supported LTO compression algorithms: zlib > gcc version 11.1.0 (g5964b5cd7272) > > > > > ^ > > CC arch/riscv/kernel/process.o > > make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 > > make[5]: *** Waiting for unfinished jobs.... > > > > Thanks, > > Conor. > > > > > > [1] https://github.com/guoren83/linux/tree/generic_entry_v3 > > > > > > V3: > > > - Fixup CONFIG_COMPAT=n compile error > > > - Add THREAD_SIZE_ORDER config > > > - Optimize elf_kexec.c warning fixup > > > - Add static to irq_stack_ptr definition > > > > > > V2: > > > Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ > > > - Fixup compile error by include "riscv: ptrace: Remove duplicate > > > operation" > > > - Fixup compile warning > > > Reported-by: kernel test robot <lkp@intel.com> > > > - Add test repo link in cover letter > > > > > > V1: > > > Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ > > > > > > Guo Ren (7): > > > riscv: elf_kexec: Fixup compile warning > > > riscv: compat_syscall_table: Fixup compile warning > > > riscv: ptrace: Remove duplicate operation > > > riscv: convert to generic entry > > > riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK > > > riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK > > > riscv: Add config of thread stack size > > > > > > arch/riscv/Kconfig | 19 ++ > > > arch/riscv/include/asm/csr.h | 1 - > > > arch/riscv/include/asm/entry-common.h | 8 + > > > arch/riscv/include/asm/irq.h | 3 + > > > arch/riscv/include/asm/ptrace.h | 10 +- > > > arch/riscv/include/asm/stacktrace.h | 5 + > > > arch/riscv/include/asm/syscall.h | 6 + > > > arch/riscv/include/asm/thread_info.h | 19 +- > > > arch/riscv/include/asm/vmap_stack.h | 28 +++ > > > arch/riscv/kernel/Makefile | 1 + > > > arch/riscv/kernel/elf_kexec.c | 2 +- > > > arch/riscv/kernel/entry.S | 255 +++++--------------------- > > > arch/riscv/kernel/irq.c | 75 ++++++++ > > > arch/riscv/kernel/ptrace.c | 41 ----- > > > arch/riscv/kernel/signal.c | 21 +-- > > > arch/riscv/kernel/sys_riscv.c | 27 +++ > > > arch/riscv/kernel/traps.c | 11 ++ > > > arch/riscv/mm/fault.c | 12 +- > > > 18 files changed, 259 insertions(+), 285 deletions(-) > > > create mode 100644 arch/riscv/include/asm/entry-common.h > > > create mode 100644 arch/riscv/include/asm/vmap_stack.h > > > > > > > -- > Best Regards > Guo Ren
On 07/09/2022 03:52, Guo Ren wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Hi Conor, > > I've found the root cause, you are using llvm: Yup, probably should have specified - sorry. I didn't realise that that was something GCC wouldn't complain about. It was an LLVM=1 build with clang-15. I usually do builds with clang while testing patches as it seems to be lesser used. Thanks, Conor. > > $ grep "bare sym" llvm -rn |grep RISCV > llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1296: return > Error(ErrorLoc, "operand must be a bare symbol name"); > llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1304: return > Error(ErrorLoc, "operand must be a bare symbol name"); > > That means we could fix up Binutils with a warning at least. > > Thx for pointing it out. > > On Wed, Sep 7, 2022 at 8:54 AM Guo Ren <guoren@kernel.org> wrote: >> >> On Wed, Sep 7, 2022 at 1:42 AM <Conor.Dooley@microchip.com> wrote: >>> >>> On 06/09/2022 04:54, guoren@kernel.org wrote: >>>> From: Guo Ren <guoren@linux.alibaba.com> >>>> >>>> The patches convert riscv to use the generic entry infrastructure from >>>> kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to >>>> prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK >>>> feature for the IRQ_STACKS config. You can try it directly with [1]. >>> >>> Hey Guo Ren, >>> I applied this patchset to v6.0-rc4 & ran into a build error: >>> /stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name >>> la a3, ((1 << (12)) << (2 + 0)) >> Yes, please try: >> - la a3, IRQ_STACK_SIZE >> + li a3, IRQ_STACK_SIZE >> >> la is for the symbol, not immediate. But why does my toolchain not >> report the error? >> >> ➜ linux git:(generic_entry_v3) make ARCH=riscv >> CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g >> O=../build-riscv/ -kj62 all -kj >> ➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v >> Using built-in specs. >> COLLECT_GCC=riscv64-unknown-linux-gnu-gcc >> COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper >> Target: riscv64-unknown-linux-gnu >> Configured with: >> /home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure >> --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv >> --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 >> --with-system-zlib --enable-shared --enable-tls >> --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp >> --disable-libquadmath --disable-libsanitizer --disable-nls >> --disable-bootstrap --src=.././riscv-gcc --enable-multilib >> --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket >> --with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' >> 'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' >> Thread model: posix >> Supported LTO compression algorithms: zlib >> gcc version 11.1.0 (g5964b5cd7272) >> >> >> >>> ^ >>> CC arch/riscv/kernel/process.o >>> make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 >>> make[5]: *** Waiting for unfinished jobs.... >>> >>> Thanks, >>> Conor. >>>> >>>> [1] https://github.com/guoren83/linux/tree/generic_entry_v3 >>>> >>>> V3: >>>> - Fixup CONFIG_COMPAT=n compile error >>>> - Add THREAD_SIZE_ORDER config >>>> - Optimize elf_kexec.c warning fixup >>>> - Add static to irq_stack_ptr definition >>>> >>>> V2: >>>> Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ >>>> - Fixup compile error by include "riscv: ptrace: Remove duplicate >>>> operation" >>>> - Fixup compile warning >>>> Reported-by: kernel test robot <lkp@intel.com> >>>> - Add test repo link in cover letter >>>> >>>> V1: >>>> Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ >>>> >>>> Guo Ren (7): >>>> riscv: elf_kexec: Fixup compile warning >>>> riscv: compat_syscall_table: Fixup compile warning >>>> riscv: ptrace: Remove duplicate operation >>>> riscv: convert to generic entry >>>> riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK >>>> riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK >>>> riscv: Add config of thread stack size >>>> >>>> arch/riscv/Kconfig | 19 ++ >>>> arch/riscv/include/asm/csr.h | 1 - >>>> arch/riscv/include/asm/entry-common.h | 8 + >>>> arch/riscv/include/asm/irq.h | 3 + >>>> arch/riscv/include/asm/ptrace.h | 10 +- >>>> arch/riscv/include/asm/stacktrace.h | 5 + >>>> arch/riscv/include/asm/syscall.h | 6 + >>>> arch/riscv/include/asm/thread_info.h | 19 +- >>>> arch/riscv/include/asm/vmap_stack.h | 28 +++ >>>> arch/riscv/kernel/Makefile | 1 + >>>> arch/riscv/kernel/elf_kexec.c | 2 +- >>>> arch/riscv/kernel/entry.S | 255 +++++--------------------- >>>> arch/riscv/kernel/irq.c | 75 ++++++++ >>>> arch/riscv/kernel/ptrace.c | 41 ----- >>>> arch/riscv/kernel/signal.c | 21 +-- >>>> arch/riscv/kernel/sys_riscv.c | 27 +++ >>>> arch/riscv/kernel/traps.c | 11 ++ >>>> arch/riscv/mm/fault.c | 12 +- >>>> 18 files changed, 259 insertions(+), 285 deletions(-) >>>> create mode 100644 arch/riscv/include/asm/entry-common.h >>>> create mode 100644 arch/riscv/include/asm/vmap_stack.h >>>> >> >> >> >> -- >> Best Regards >> Guo Ren > > > > -- > Best Regards > Guo Ren
On Wed, Sep 7, 2022 at 2:23 PM <Conor.Dooley@microchip.com> wrote: > > On 07/09/2022 03:52, Guo Ren wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Hi Conor, > > > > I've found the root cause, you are using llvm: > > Yup, probably should have specified - sorry. I didn't realise that It's my typo bug. You reminded me of using clang. > that was something GCC wouldn't complain about. It was an LLVM=1 > build with clang-15. > > I usually do builds with clang while testing patches as it seems > to be lesser used. > > Thanks, > Conor. > > > > > $ grep "bare sym" llvm -rn |grep RISCV > > llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1296: return > > Error(ErrorLoc, "operand must be a bare symbol name"); > > llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1304: return > > Error(ErrorLoc, "operand must be a bare symbol name"); > > > > That means we could fix up Binutils with a warning at least. > > > > Thx for pointing it out. > > > > On Wed, Sep 7, 2022 at 8:54 AM Guo Ren <guoren@kernel.org> wrote: > >> > >> On Wed, Sep 7, 2022 at 1:42 AM <Conor.Dooley@microchip.com> wrote: > >>> > >>> On 06/09/2022 04:54, guoren@kernel.org wrote: > >>>> From: Guo Ren <guoren@linux.alibaba.com> > >>>> > >>>> The patches convert riscv to use the generic entry infrastructure from > >>>> kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to > >>>> prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK > >>>> feature for the IRQ_STACKS config. You can try it directly with [1]. > >>> > >>> Hey Guo Ren, > >>> I applied this patchset to v6.0-rc4 & ran into a build error: > >>> /stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name > >>> la a3, ((1 << (12)) << (2 + 0)) > >> Yes, please try: > >> - la a3, IRQ_STACK_SIZE > >> + li a3, IRQ_STACK_SIZE > >> > >> la is for the symbol, not immediate. But why does my toolchain not > >> report the error? > >> > >> ➜ linux git:(generic_entry_v3) make ARCH=riscv > >> CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g > >> O=../build-riscv/ -kj62 all -kj > >> ➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v > >> Using built-in specs. > >> COLLECT_GCC=riscv64-unknown-linux-gnu-gcc > >> COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper > >> Target: riscv64-unknown-linux-gnu > >> Configured with: > >> /home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure > >> --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv > >> --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 > >> --with-system-zlib --enable-shared --enable-tls > >> --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp > >> --disable-libquadmath --disable-libsanitizer --disable-nls > >> --disable-bootstrap --src=.././riscv-gcc --enable-multilib > >> --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket > >> --with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' > >> 'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow' > >> Thread model: posix > >> Supported LTO compression algorithms: zlib > >> gcc version 11.1.0 (g5964b5cd7272) > >> > >> > >> > >>> ^ > >>> CC arch/riscv/kernel/process.o > >>> make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 > >>> make[5]: *** Waiting for unfinished jobs.... > >>> > >>> Thanks, > >>> Conor. > >>>> > >>>> [1] https://github.com/guoren83/linux/tree/generic_entry_v3 > >>>> > >>>> V3: > >>>> - Fixup CONFIG_COMPAT=n compile error > >>>> - Add THREAD_SIZE_ORDER config > >>>> - Optimize elf_kexec.c warning fixup > >>>> - Add static to irq_stack_ptr definition > >>>> > >>>> V2: > >>>> Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ > >>>> - Fixup compile error by include "riscv: ptrace: Remove duplicate > >>>> operation" > >>>> - Fixup compile warning > >>>> Reported-by: kernel test robot <lkp@intel.com> > >>>> - Add test repo link in cover letter > >>>> > >>>> V1: > >>>> Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ > >>>> > >>>> Guo Ren (7): > >>>> riscv: elf_kexec: Fixup compile warning > >>>> riscv: compat_syscall_table: Fixup compile warning > >>>> riscv: ptrace: Remove duplicate operation > >>>> riscv: convert to generic entry > >>>> riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK > >>>> riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK > >>>> riscv: Add config of thread stack size > >>>> > >>>> arch/riscv/Kconfig | 19 ++ > >>>> arch/riscv/include/asm/csr.h | 1 - > >>>> arch/riscv/include/asm/entry-common.h | 8 + > >>>> arch/riscv/include/asm/irq.h | 3 + > >>>> arch/riscv/include/asm/ptrace.h | 10 +- > >>>> arch/riscv/include/asm/stacktrace.h | 5 + > >>>> arch/riscv/include/asm/syscall.h | 6 + > >>>> arch/riscv/include/asm/thread_info.h | 19 +- > >>>> arch/riscv/include/asm/vmap_stack.h | 28 +++ > >>>> arch/riscv/kernel/Makefile | 1 + > >>>> arch/riscv/kernel/elf_kexec.c | 2 +- > >>>> arch/riscv/kernel/entry.S | 255 +++++--------------------- > >>>> arch/riscv/kernel/irq.c | 75 ++++++++ > >>>> arch/riscv/kernel/ptrace.c | 41 ----- > >>>> arch/riscv/kernel/signal.c | 21 +-- > >>>> arch/riscv/kernel/sys_riscv.c | 27 +++ > >>>> arch/riscv/kernel/traps.c | 11 ++ > >>>> arch/riscv/mm/fault.c | 12 +- > >>>> 18 files changed, 259 insertions(+), 285 deletions(-) > >>>> create mode 100644 arch/riscv/include/asm/entry-common.h > >>>> create mode 100644 arch/riscv/include/asm/vmap_stack.h > >>>> > >> > >> > >> > >> -- > >> Best Regards > >> Guo Ren > > > > > > > > -- > > Best Regards > > Guo Ren >
From: Guo Ren <guoren@linux.alibaba.com> The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1]. [1] https://github.com/guoren83/linux/tree/generic_entry_v3 V3: - Fixup CONFIG_COMPAT=n compile error - Add THREAD_SIZE_ORDER config - Optimize elf_kexec.c warning fixup - Add static to irq_stack_ptr definition V2: Link: https://lore.kernel.org/linux-riscv/20220904072637.8619-1-guoren@kernel.org/ - Fixup compile error by include "riscv: ptrace: Remove duplicate operation" - Fixup compile warning Reported-by: kernel test robot <lkp@intel.com> - Add test repo link in cover letter V1: Link: https://lore.kernel.org/linux-riscv/20220903163808.1954131-1-guoren@kernel.org/ Guo Ren (7): riscv: elf_kexec: Fixup compile warning riscv: compat_syscall_table: Fixup compile warning riscv: ptrace: Remove duplicate operation riscv: convert to generic entry riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK riscv: Add config of thread stack size arch/riscv/Kconfig | 19 ++ arch/riscv/include/asm/csr.h | 1 - arch/riscv/include/asm/entry-common.h | 8 + arch/riscv/include/asm/irq.h | 3 + arch/riscv/include/asm/ptrace.h | 10 +- arch/riscv/include/asm/stacktrace.h | 5 + arch/riscv/include/asm/syscall.h | 6 + arch/riscv/include/asm/thread_info.h | 19 +- arch/riscv/include/asm/vmap_stack.h | 28 +++ arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/elf_kexec.c | 2 +- arch/riscv/kernel/entry.S | 255 +++++--------------------- arch/riscv/kernel/irq.c | 75 ++++++++ arch/riscv/kernel/ptrace.c | 41 ----- arch/riscv/kernel/signal.c | 21 +-- arch/riscv/kernel/sys_riscv.c | 27 +++ arch/riscv/kernel/traps.c | 11 ++ arch/riscv/mm/fault.c | 12 +- 18 files changed, 259 insertions(+), 285 deletions(-) create mode 100644 arch/riscv/include/asm/entry-common.h create mode 100644 arch/riscv/include/asm/vmap_stack.h