diff mbox series

[v2] dt-bindings: qcom,pdc: convert to YAML

Message ID 20220103074348.6039-1-luca.weiss@fairphone.com (mailing list archive)
State Not Applicable
Headers show
Series [v2] dt-bindings: qcom,pdc: convert to YAML | expand

Commit Message

Luca Weiss Jan. 3, 2022, 7:43 a.m. UTC
Convert the PDC interrupt controller bindings to YAML.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes since v1:
* Adjust description of second reg-name as suggested by Maulik Shah

@Rob Herring: Hope it's ok to keep your R-b given the above changes

This patch depends on the following patch, which fixed sm8250 & sm8350
compatibles and adds sm6350.
https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/

 .../interrupt-controller/qcom,pdc.txt         | 77 -----------------
 .../interrupt-controller/qcom,pdc.yaml        | 86 +++++++++++++++++++
 2 files changed, 86 insertions(+), 77 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml

Comments

Krzysztof Kozlowski May 9, 2022, 8:38 a.m. UTC | #1
On 03/01/2022 08:43, Luca Weiss wrote:
> Convert the PDC interrupt controller bindings to YAML.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> Changes since v1:
> * Adjust description of second reg-name as suggested by Maulik Shah
> 
> @Rob Herring: Hope it's ok to keep your R-b given the above changes
> 
> This patch depends on the following patch, which fixed sm8250 & sm8350
> compatibles and adds sm6350.
> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Luca,
I think this needs resending as dependency was merged. Alternatively,
maybe Bjorn could pick it up through QCom SoC?

Best regards,
Krzysztof
Krzysztof Kozlowski May 9, 2022, 8:40 a.m. UTC | #2
On 09/05/2022 10:38, Krzysztof Kozlowski wrote:
> On 03/01/2022 08:43, Luca Weiss wrote:
>> Convert the PDC interrupt controller bindings to YAML.
>>
>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>> Changes since v1:
>> * Adjust description of second reg-name as suggested by Maulik Shah
>>
>> @Rob Herring: Hope it's ok to keep your R-b given the above changes
>>
>> This patch depends on the following patch, which fixed sm8250 & sm8350
>> compatibles and adds sm6350.
>> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> Luca,
> I think this needs resending as dependency was merged. Alternatively,
> maybe Bjorn could pick it up through QCom SoC?

Correction - it seems that Rob took the dependency in April, so this
should go via Rob's tree as well.

Luca, can you resend without Rob's Review tag and ask him to pick it up?


Best regards,
Krzysztof
Luca Weiss May 16, 2022, 7:45 a.m. UTC | #3
Hi Krzysztof,

On Mon May 9, 2022 at 10:40 AM CEST, Krzysztof Kozlowski wrote:
> On 09/05/2022 10:38, Krzysztof Kozlowski wrote:
> > On 03/01/2022 08:43, Luca Weiss wrote:
> >> Convert the PDC interrupt controller bindings to YAML.
> >>
> >> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> >> Reviewed-by: Rob Herring <robh@kernel.org>
> >> ---
> >> Changes since v1:
> >> * Adjust description of second reg-name as suggested by Maulik Shah
> >>
> >> @Rob Herring: Hope it's ok to keep your R-b given the above changes
> >>
> >> This patch depends on the following patch, which fixed sm8250 & sm8350
> >> compatibles and adds sm6350.
> >> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
> > 
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > 
> > Luca,
> > I think this needs resending as dependency was merged. Alternatively,
> > maybe Bjorn could pick it up through QCom SoC?
>
> Correction - it seems that Rob took the dependency in April, so this
> should go via Rob's tree as well.
>
> Luca, can you resend without Rob's Review tag and ask him to pick it up?
>

So... since torvalds/master my sm6350 patch is merged through Rob's
tree, but there was also a sm8150 patch applied through Linus Walleij's
tree. This means (as far as I understand) that neither can really
properly apply this (rebased) patch as one tree will have missed the
other commit.

Does it make sense to send a v3 rebased on linux-next now, or wait until
this has settled down in torvalds's tree?

Regards
Luca

>
> Best regards,
> Krzysztof
Krzysztof Kozlowski May 16, 2022, 10:35 a.m. UTC | #4
On 16/05/2022 09:45, Luca Weiss wrote:
> Hi Krzysztof,
> 
> On Mon May 9, 2022 at 10:40 AM CEST, Krzysztof Kozlowski wrote:
>> On 09/05/2022 10:38, Krzysztof Kozlowski wrote:
>>> On 03/01/2022 08:43, Luca Weiss wrote:
>>>> Convert the PDC interrupt controller bindings to YAML.
>>>>
>>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>>>> Reviewed-by: Rob Herring <robh@kernel.org>
>>>> ---
>>>> Changes since v1:
>>>> * Adjust description of second reg-name as suggested by Maulik Shah
>>>>
>>>> @Rob Herring: Hope it's ok to keep your R-b given the above changes
>>>>
>>>> This patch depends on the following patch, which fixed sm8250 & sm8350
>>>> compatibles and adds sm6350.
>>>> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
>>>
>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>>
>>> Luca,
>>> I think this needs resending as dependency was merged. Alternatively,
>>> maybe Bjorn could pick it up through QCom SoC?
>>
>> Correction - it seems that Rob took the dependency in April, so this
>> should go via Rob's tree as well.
>>
>> Luca, can you resend without Rob's Review tag and ask him to pick it up?
>>
> 
> So... since torvalds/master my sm6350 patch is merged through Rob's

If it was merged to torvalds/master, it's not a dependency anymore...

> tree, but there was also a sm8150 patch applied through Linus Walleij's
> tree. This means (as far as I understand) that neither can really
> properly apply this (rebased) patch as one tree will have missed the
> other commit.

sm8150 patch is also a dependency?

> 
> Does it make sense to send a v3 rebased on linux-next now, or wait until
> this has settled down in torvalds's tree?

Conflicts can be resolved, you just need to choose one tree to based on.


Best regards,
Krzysztof
Luca Weiss May 16, 2022, 11:22 a.m. UTC | #5
Hi Krzysztof,

On Mon May 16, 2022 at 12:35 PM CEST, Krzysztof Kozlowski wrote:
> On 16/05/2022 09:45, Luca Weiss wrote:
> > Hi Krzysztof,
> > 
> > On Mon May 9, 2022 at 10:40 AM CEST, Krzysztof Kozlowski wrote:
> >> On 09/05/2022 10:38, Krzysztof Kozlowski wrote:
> >>> On 03/01/2022 08:43, Luca Weiss wrote:
> >>>> Convert the PDC interrupt controller bindings to YAML.
> >>>>
> >>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> >>>> Reviewed-by: Rob Herring <robh@kernel.org>
> >>>> ---
> >>>> Changes since v1:
> >>>> * Adjust description of second reg-name as suggested by Maulik Shah
> >>>>
> >>>> @Rob Herring: Hope it's ok to keep your R-b given the above changes
> >>>>
> >>>> This patch depends on the following patch, which fixed sm8250 & sm8350
> >>>> compatibles and adds sm6350.
> >>>> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
> >>>
> >>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> >>>
> >>> Luca,
> >>> I think this needs resending as dependency was merged. Alternatively,
> >>> maybe Bjorn could pick it up through QCom SoC?
> >>
> >> Correction - it seems that Rob took the dependency in April, so this
> >> should go via Rob's tree as well.
> >>
> >> Luca, can you resend without Rob's Review tag and ask him to pick it up?
> >>
> > 
> > So... since torvalds/master my sm6350 patch is merged through Rob's
>
> If it was merged to torvalds/master, it's not a dependency anymore...

Yeah of course, but currently sm6350 and sm8150 patches are lined up to
be merged in the next merge window from different trees which just make
it difficult.

>
> > tree, but there was also a sm8150 patch applied through Linus Walleij's
> > tree. This means (as far as I understand) that neither can really
> > properly apply this (rebased) patch as one tree will have missed the
> > other commit.
>
> sm8150 patch is also a dependency?

I mean either this conversion patch includes sm8150 or it doesn't but
given it's applied to some tree and lined up for the next merge window
it should probably include it?

>
> > 
> > Does it make sense to send a v3 rebased on linux-next now, or wait until
> > this has settled down in torvalds's tree?
>
> Conflicts can be resolved, you just need to choose one tree to based on.

If conflict resolution will be done when merging Linus' and Rob's tree
(e.g. add sm8150 to the yaml) then this v2 can be applied to Rob's tree
now.

Otherwise, I'll just wait until everything's merged into torvald's tree
so the issue disappears.

Regards
Luca

>
>
> Best regards,
> Krzysztof
Rob Herring Sept. 9, 2022, 2:39 p.m. UTC | #6
On Mon, Jan 03, 2022 at 08:43:48AM +0100, Luca Weiss wrote:
> Convert the PDC interrupt controller bindings to YAML.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> Changes since v1:
> * Adjust description of second reg-name as suggested by Maulik Shah
> 
> @Rob Herring: Hope it's ok to keep your R-b given the above changes
> 
> This patch depends on the following patch, which fixed sm8250 & sm8350
> compatibles and adds sm6350.
> https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
> 
>  .../interrupt-controller/qcom,pdc.txt         | 77 -----------------
>  .../interrupt-controller/qcom,pdc.yaml        | 86 +++++++++++++++++++
>  2 files changed, 86 insertions(+), 77 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml

In checking top compatibles without schemas[1][2], I found this. Now 
applied with sm8150 compatible which was the only change since this.

Rob

[1] https://gitlab.com/robherring/linux-dt/-/jobs/3005191129
[2] https://gitlab.com/robherring/linux-dt/-/jobs/3005191129/artifacts/file/all-compatible-warnings.log
Luca Weiss Sept. 12, 2022, 6:50 a.m. UTC | #7
Hi Rob,

On Fri Sep 9, 2022 at 4:39 PM CEST, Rob Herring wrote:
> On Mon, Jan 03, 2022 at 08:43:48AM +0100, Luca Weiss wrote:
> > Convert the PDC interrupt controller bindings to YAML.
> > 
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> > Changes since v1:
> > * Adjust description of second reg-name as suggested by Maulik Shah
> > 
> > @Rob Herring: Hope it's ok to keep your R-b given the above changes
> > 
> > This patch depends on the following patch, which fixed sm8250 & sm8350
> > compatibles and adds sm6350.
> > https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@fairphone.com/
> > 
> >  .../interrupt-controller/qcom,pdc.txt         | 77 -----------------
> >  .../interrupt-controller/qcom,pdc.yaml        | 86 +++++++++++++++++++
> >  2 files changed, 86 insertions(+), 77 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
> >  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
>
> In checking top compatibles without schemas[1][2], I found this. Now 
> applied with sm8150 compatible which was the only change since this.

Thanks for digging this out, I have totally forgotten about it!

Regards
Luca

>
> Rob
>
> [1] https://gitlab.com/robherring/linux-dt/-/jobs/3005191129
> [2] https://gitlab.com/robherring/linux-dt/-/jobs/3005191129/artifacts/file/all-compatible-warnings.log
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
deleted file mode 100644
index 3b7b1134dea9..000000000000
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
+++ /dev/null
@@ -1,77 +0,0 @@ 
-PDC interrupt controller
-
-Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a
-Power Domain Controller (PDC) that is on always-on domain. In addition to
-providing power control for the power domains, the hardware also has an
-interrupt controller that can be used to help detect edge low interrupts as
-well detect interrupts when the GIC is non-operational.
-
-GIC is parent interrupt controller at the highest level. Platform interrupt
-controller PDC is next in hierarchy, followed by others. Drivers requiring
-wakeup capabilities of their device interrupts routed through the PDC, must
-specify PDC as their interrupt controller and request the PDC port associated
-with the GIC interrupt. See example below.
-
-Properties:
-
-- compatible:
-	Usage: required
-	Value type: <string>
-	Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
-		    - "qcom,sc7180-pdc": For SC7180
-		    - "qcom,sc7280-pdc": For SC7280
-		    - "qcom,sdm845-pdc": For SDM845
-		    - "qcom,sm6350-pdc": For SM6350
-		    - "qcom,sm8250-pdc": For SM8250
-		    - "qcom,sm8350-pdc": For SM8350
-
-- reg:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: Specifies the base physical address for PDC hardware.
-
-- interrupt-cells:
-	Usage: required
-	Value type: <u32>
-	Definition: Specifies the number of cells needed to encode an interrupt
-		    source.
-		    Must be 2.
-		    The first element of the tuple is the PDC pin for the
-		    interrupt.
-		    The second element is the trigger type.
-
-- interrupt-controller:
-	Usage: required
-	Value type: <bool>
-	Definition: Identifies the node as an interrupt controller.
-
-- qcom,pdc-ranges:
-	Usage: required
-	Value type: <u32 array>
-	Definition: Specifies the PDC pin offset and the number of PDC ports.
-		    The tuples indicates the valid mapping of valid PDC ports
-		    and their hwirq mapping.
-		    The first element of the tuple is the starting PDC port.
-		    The second element is the GIC hwirq number for the PDC port.
-		    The third element is the number of interrupts in sequence.
-
-Example:
-
-	pdc: interrupt-controller@b220000 {
-		compatible = "qcom,sdm845-pdc";
-		reg = <0xb220000 0x30000>;
-		qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
-		#interrupt-cells = <2>;
-		interrupt-parent = <&intc>;
-		interrupt-controller;
-	};
-
-DT binding of a device that wants to use the GIC SPI 514 as a wakeup
-interrupt, must do -
-
-	wake-device {
-		interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-In this case interrupt 514 would be mapped to port 2 on the PDC as defined by
-the qcom,pdc-ranges property.
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
new file mode 100644
index 000000000000..7e425f0b87cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -0,0 +1,86 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PDC interrupt controller
+
+maintainers:
+  - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description: |
+  Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a
+  Power Domain Controller (PDC) that is on always-on domain. In addition to
+  providing power control for the power domains, the hardware also has an
+  interrupt controller that can be used to help detect edge low interrupts as
+  well detect interrupts when the GIC is non-operational.
+
+  GIC is parent interrupt controller at the highest level. Platform interrupt
+  controller PDC is next in hierarchy, followed by others. Drivers requiring
+  wakeup capabilities of their device interrupts routed through the PDC, must
+  specify PDC as their interrupt controller and request the PDC port associated
+  with the GIC interrupt. See example below.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,sc7180-pdc
+          - qcom,sc7280-pdc
+          - qcom,sdm845-pdc
+          - qcom,sm6350-pdc
+          - qcom,sm8250-pdc
+          - qcom,sm8350-pdc
+      - const: qcom,pdc
+
+  reg:
+    minItems: 1
+    items:
+      - description: PDC base register region
+      - description: Edge or Level config register for SPI interrupts
+
+  '#interrupt-cells':
+    const: 2
+
+  interrupt-controller: true
+
+  qcom,pdc-ranges:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    minItems: 1
+    maxItems: 32 # no hard limit
+    items:
+      items:
+        - description: starting PDC port
+        - description: GIC hwirq number for the PDC port
+        - description: number of interrupts in sequence
+    description: |
+      Specifies the PDC pin offset and the number of PDC ports.
+      The tuples indicates the valid mapping of valid PDC ports
+      and their hwirq mapping.
+
+required:
+  - compatible
+  - reg
+  - '#interrupt-cells'
+  - interrupt-controller
+  - qcom,pdc-ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    pdc: interrupt-controller@b220000 {
+        compatible = "qcom,sdm845-pdc", "qcom,pdc";
+        reg = <0xb220000 0x30000>;
+        qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>;
+        #interrupt-cells = <2>;
+        interrupt-parent = <&intc>;
+        interrupt-controller;
+    };
+
+    wake-device {
+        interrupts-extended = <&pdc 2 IRQ_TYPE_LEVEL_HIGH>;
+    };