| Message ID | 20220919164616.12492-1-macroalpha82@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | rockchip-dsi for rk3568 | expand |
On 19-09-22, 11:46, Chris Morgan wrote: > From: Chris Morgan <macromorgan@hotmail.com> > > This series adds support for the dsi and dphy controllers on the > Rockchip RK3568. Applied 1,2, thanks
On Mon, 19 Sep 2022 11:46:13 -0500, Chris Morgan wrote: > This series adds support for the dsi and dphy controllers on the > Rockchip RK3568. > > Tested on an Anbernic RG503, Anbernic RG353P, and Odroid Go Advance. > > Changes since V3: > - Added labels to bindings in rk356x.dtsi file to make it easier to > reference in board dts files. > > [...] Applied, thanks! [3/3] arm64: dts: rockchip: Add DSI and DSI-DPHY nodes to rk356x commit: e18d9b093006d8abd53e1ce13c0d5a8d0fcd5f64 Best regards,
I am trying to get the MIPI-DSI output to work with the Pine64 7" LCD (a Feiyang panel) on Quartz64-a. I was able to get the previous DSI Enablement serious (as published on September 6th) working on top of 6.0-RC4, with some help from Chris, but I have not been able to recreate the same success with these latest patches on top of 6.0-RC6. Has anyone else gotten their MIP-DSI output to work with these latest patches? and, would they be willing to share their kernel config and DTS files with me? I am probably missing one silly thing, but I don't have the skills to figure out what it is. I would like to get this working and repeatable and then share it with the Pine64 community. thanks, Philip On 23/09/2022 11:34, Heiko Stuebner wrote: > On Mon, 19 Sep 2022 11:46:13 -0500, Chris Morgan wrote: >> This series adds support for the dsi and dphy controllers on the >> Rockchip RK3568. >> >> Tested on an Anbernic RG503, Anbernic RG353P, and Odroid Go Advance. >> >> Changes since V3: >> - Added labels to bindings in rk356x.dtsi file to make it easier to >> reference in board dts files. >> >> [...] > > Applied, thanks! > > [3/3] arm64: dts: rockchip: Add DSI and DSI-DPHY nodes to rk356x > commit: e18d9b093006d8abd53e1ce13c0d5a8d0fcd5f64 > > Best regards,
From: Chris Morgan <macromorgan@hotmail.com> This series adds support for the dsi and dphy controllers on the Rockchip RK3568. Tested on an Anbernic RG503, Anbernic RG353P, and Odroid Go Advance. Changes since V3: - Added labels to bindings in rk356x.dtsi file to make it easier to reference in board dts files. Changes since V2: - Removed dsi controller patches, as those have been merged upstream. - Removed notes about rolling back clock drivers. If I set the parent clock of the VOP port I'm using to VPLL and set the clock rate of PLL_VPLL to 500MHz this series works correctly for my panels without rolling anything back (per Heiko this is the correct way). - Added additional details about refactoring DPHY driver to add 2.5GHz for rk356x. All other devices still have a max speed of 1GHz. - Notified Heiko that the BIT(5) for both PLL_POST_DIV_ENABLE and PLL_POST_DIV_ENABLE_MASK is deliberate, because of how the phy_update_bits() works. Changes since RFCv1: - Identified cause of image shift (clock changes). - Noted that driver works now. - Added devicetree nodes for rk356x.dtsi. Chris Morgan (3): dt-bindings: phy-rockchip-inno-dsidphy: add compatible for rk3568 phy/rockchip: inno-dsidphy: Add support for rk3568 arm64: dts: rockchip: Add DSI and DSI-DPHY nodes to rk356x .../bindings/phy/rockchip,px30-dsi-dphy.yaml | 1 + arch/arm64/boot/dts/rockchip/rk356x.dtsi | 80 +++++++ .../phy/rockchip/phy-rockchip-inno-dsidphy.c | 204 ++++++++++++++---- 3 files changed, 239 insertions(+), 46 deletions(-)