| Message ID | YuI2zF1hP65+LE7r@kili (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mtd: rawnand: meson: fix bit map use in meson_nfc_ecc_correct() | expand |
Hi Dan, Thanks. On 2022/7/28 15:12, Dan Carpenter wrote: > [ EXTERNAL EMAIL ] > > The meson_nfc_ecc_correct() function accidentally does a right shift > instead of a left shift so it only works for BIT(0). Also use > BIT_ULL() because "correct_bitmap" is a u64 and we want to avoid > shift wrapping bugs. > > Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> > --- >>From review. Untested. > > drivers/mtd/nand/raw/meson_nand.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c > index 829b76b303aa..ad2ffd0ca800 100644 > --- a/drivers/mtd/nand/raw/meson_nand.c > +++ b/drivers/mtd/nand/raw/meson_nand.c > @@ -454,7 +454,7 @@ static int meson_nfc_ecc_correct(struct nand_chip *nand, u32 *bitflips, > if (ECC_ERR_CNT(*info) != ECC_UNCORRECTABLE) { > mtd->ecc_stats.corrected += ECC_ERR_CNT(*info); > *bitflips = max_t(u32, *bitflips, ECC_ERR_CNT(*info)); > - *correct_bitmap |= 1 >> i; > + *correct_bitmap |= BIT_ULL(i); > continue; > } > if ((nand->options & NAND_NEED_SCRAMBLING) && > @@ -800,7 +800,7 @@ static int meson_nfc_read_page_hwecc(struct nand_chip *nand, u8 *buf, > u8 *data = buf + i * ecc->size; > u8 *oob = nand->oob_poi + i * (ecc->bytes + 2); > > - if (correct_bitmap & (1 << i)) > + if (correct_bitmap & BIT_ULL(i)) > continue; > ret = nand_check_erased_ecc_chunk(data, ecc->size, > oob, ecc->bytes + 2, Acked-by: Liang Yang <liang.yang@amlogic.com> Thanks, Liang
On Thu, 2022-07-28 at 07:12:12 UTC, Dan Carpenter wrote: > The meson_nfc_ecc_correct() function accidentally does a right shift > instead of a left shift so it only works for BIT(0). Also use > BIT_ULL() because "correct_bitmap" is a u64 and we want to avoid > shift wrapping bugs. > > Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> > Acked-by: Liang Yang <liang.yang@amlogic.com> Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks. Miquel
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index 829b76b303aa..ad2ffd0ca800 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -454,7 +454,7 @@ static int meson_nfc_ecc_correct(struct nand_chip *nand, u32 *bitflips, if (ECC_ERR_CNT(*info) != ECC_UNCORRECTABLE) { mtd->ecc_stats.corrected += ECC_ERR_CNT(*info); *bitflips = max_t(u32, *bitflips, ECC_ERR_CNT(*info)); - *correct_bitmap |= 1 >> i; + *correct_bitmap |= BIT_ULL(i); continue; } if ((nand->options & NAND_NEED_SCRAMBLING) && @@ -800,7 +800,7 @@ static int meson_nfc_read_page_hwecc(struct nand_chip *nand, u8 *buf, u8 *data = buf + i * ecc->size; u8 *oob = nand->oob_poi + i * (ecc->bytes + 2); - if (correct_bitmap & (1 << i)) + if (correct_bitmap & BIT_ULL(i)) continue; ret = nand_check_erased_ecc_chunk(data, ecc->size, oob, ecc->bytes + 2,
The meson_nfc_ecc_correct() function accidentally does a right shift instead of a left shift so it only works for BIT(0). Also use BIT_ULL() because "correct_bitmap" is a u64 and we want to avoid shift wrapping bugs. Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> --- From review. Untested. drivers/mtd/nand/raw/meson_nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)