| Message ID | 20220916091706.4559-1-jammy_huang@aspeedtech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/ast: Fix video broken in some resolutions on ast2600 | expand |
Hi Am 16.09.22 um 11:17 schrieb Jammy Huang: > Some cases are not handled well for ast2600. > > Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> > --- > drivers/gpu/drm/ast/ast_mode.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c > index d327dcbaf032..be9bbc888ac3 100644 > --- a/drivers/gpu/drm/ast/ast_mode.c > +++ b/drivers/gpu/drm/ast/ast_mode.c > @@ -314,7 +314,7 @@ static void ast_set_crtc_reg(struct ast_private *ast, > u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; > u16 temp, precache = 0; > > - if ((ast->chip == AST2500) && > + if ((ast->chip == AST2500 || ast->chip == AST2600) && > (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) > precache = 40; > > @@ -355,6 +355,12 @@ static void ast_set_crtc_reg(struct ast_private *ast, > ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); > ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); > > + // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels); Applied to drm-misc-next, but what is an 'octave pixel'? Best regards Thomas > + if ((ast->chip == AST2600) && (mode->crtc_vdisplay == 1080)) > + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x02); > + else > + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x00); > + > /* vert timings */ > temp = (mode->crtc_vtotal) - 2; > if (temp & 0x100) > @@ -432,7 +438,7 @@ static void ast_set_dclk_reg(struct ast_private *ast, > { > const struct ast_vbios_dclk_info *clk_info; > > - if (ast->chip == AST2500) > + if ((ast->chip == AST2500) || (ast->chip == AST2600)) > clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; > else > clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
Hi Thomas, On 2022/9/20 下午 04:43, Thomas Zimmermann wrote: > Hi > > Am 16.09.22 um 11:17 schrieb Jammy Huang: >> Some cases are not handled well for ast2600. >> >> Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> >> --- >> drivers/gpu/drm/ast/ast_mode.c | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/drm/ast/ast_mode.c >> b/drivers/gpu/drm/ast/ast_mode.c >> index d327dcbaf032..be9bbc888ac3 100644 >> --- a/drivers/gpu/drm/ast/ast_mode.c >> +++ b/drivers/gpu/drm/ast/ast_mode.c >> @@ -314,7 +314,7 @@ static void ast_set_crtc_reg(struct ast_private >> *ast, >> u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, >> jregAE = 0; >> u16 temp, precache = 0; >> - if ((ast->chip == AST2500) && >> + if ((ast->chip == AST2500 || ast->chip == AST2600) && >> (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) >> precache = 40; >> @@ -355,6 +355,12 @@ static void ast_set_crtc_reg(struct >> ast_private *ast, >> ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); >> ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); >> + // Workaround for HSync Time non octave pixels (1920x1080@60Hz >> HSync 44 pixels); > > Applied to drm-misc-next, but what is an 'octave pixel'? It means to make the pixel number a multiple of 8. > > Best regards > Thomas > >> + if ((ast->chip == AST2600) && (mode->crtc_vdisplay == 1080)) >> + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, >> 0x02); >> + else >> + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, >> 0x00); >> + >> /* vert timings */ >> temp = (mode->crtc_vtotal) - 2; >> if (temp & 0x100) >> @@ -432,7 +438,7 @@ static void ast_set_dclk_reg(struct ast_private >> *ast, >> { >> const struct ast_vbios_dclk_info *clk_info; >> - if (ast->chip == AST2500) >> + if ((ast->chip == AST2500) || (ast->chip == AST2600)) >> clk_info = >> &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; >> else >> clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; >
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index d327dcbaf032..be9bbc888ac3 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -314,7 +314,7 @@ static void ast_set_crtc_reg(struct ast_private *ast, u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; u16 temp, precache = 0; - if ((ast->chip == AST2500) && + if ((ast->chip == AST2500 || ast->chip == AST2600) && (vbios_mode->enh_table->flags & AST2500PreCatchCRT)) precache = 40; @@ -355,6 +355,12 @@ static void ast_set_crtc_reg(struct ast_private *ast, ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); + // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels); + if ((ast->chip == AST2600) && (mode->crtc_vdisplay == 1080)) + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x02); + else + ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xFC, 0xFD, 0x00); + /* vert timings */ temp = (mode->crtc_vtotal) - 2; if (temp & 0x100) @@ -432,7 +438,7 @@ static void ast_set_dclk_reg(struct ast_private *ast, { const struct ast_vbios_dclk_info *clk_info; - if (ast->chip == AST2500) + if ((ast->chip == AST2500) || (ast->chip == AST2600)) clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index]; else clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
Some cases are not handled well for ast2600. Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> --- drivers/gpu/drm/ast/ast_mode.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)