| Message ID | 20221005083209.222272-1-chin-ting_kuo@aspeedtech.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 5302e1ff315b40dfc9bb3f08911f5a788cc1de01 |
| Headers | show |
| Series | [v2] spi: aspeed: Fix typo in mode_bits field for AST2600 platform | expand |
On 10/5/22 10:32, Chin-Ting Kuo wrote: > Both quad SPI TX and RX modes can be supported on AST2600. > Correct typo in mode_bits field in both ast2600_fmc_data > and ast2600_spi_data structs. > > Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Thanks, C. > --- > drivers/spi/spi-aspeed-smc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c > index a334e89add86..33cefcf18392 100644 > --- a/drivers/spi/spi-aspeed-smc.c > +++ b/drivers/spi/spi-aspeed-smc.c > @@ -1163,7 +1163,7 @@ static const struct aspeed_spi_data ast2500_spi_data = { > static const struct aspeed_spi_data ast2600_fmc_data = { > .max_cs = 3, > .hastype = false, > - .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD, > + .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD, > .we0 = 16, > .ctl0 = CE0_CTRL_REG, > .timing = CE0_TIMING_COMPENSATION_REG, > @@ -1178,7 +1178,7 @@ static const struct aspeed_spi_data ast2600_fmc_data = { > static const struct aspeed_spi_data ast2600_spi_data = { > .max_cs = 2, > .hastype = false, > - .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD, > + .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD, > .we0 = 16, > .ctl0 = CE0_CTRL_REG, > .timing = CE0_TIMING_COMPENSATION_REG,
On Wed, 5 Oct 2022 16:32:09 +0800, Chin-Ting Kuo wrote: > Both quad SPI TX and RX modes can be supported on AST2600. > Correct typo in mode_bits field in both ast2600_fmc_data > and ast2600_spi_data structs. > > Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/1] spi: aspeed: Fix typo in mode_bits field for AST2600 platform commit: 5302e1ff315b40dfc9bb3f08911f5a788cc1de01 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c index a334e89add86..33cefcf18392 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -1163,7 +1163,7 @@ static const struct aspeed_spi_data ast2500_spi_data = { static const struct aspeed_spi_data ast2600_fmc_data = { .max_cs = 3, .hastype = false, - .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD, + .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD, .we0 = 16, .ctl0 = CE0_CTRL_REG, .timing = CE0_TIMING_COMPENSATION_REG, @@ -1178,7 +1178,7 @@ static const struct aspeed_spi_data ast2600_fmc_data = { static const struct aspeed_spi_data ast2600_spi_data = { .max_cs = 2, .hastype = false, - .mode_bits = SPI_RX_QUAD | SPI_RX_QUAD, + .mode_bits = SPI_RX_QUAD | SPI_TX_QUAD, .we0 = 16, .ctl0 = CE0_CTRL_REG, .timing = CE0_TIMING_COMPENSATION_REG,
Both quad SPI TX and RX modes can be supported on AST2600. Correct typo in mode_bits field in both ast2600_fmc_data and ast2600_spi_data structs. Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> --- drivers/spi/spi-aspeed-smc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)