diff mbox series

[6/6] dt-bindings: usb: ci-hdrc-usb2: Add more phy tuning properties

Message ID 20221011082924.884123-7-s.hauer@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series usb: chipidea: Export more phy tuning parameters to device tree | expand

Commit Message

Sascha Hauer Oct. 11, 2022, 8:29 a.m. UTC
Following the example of samsung,picophy-dc-vol-level-adjust more
phy tuning properties are added for configuring the remaining bitfields
in the USBNC_n_PHY_CFG1 register.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 .../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 79 +++++++++++++++++++
 1 file changed, 79 insertions(+)

Comments

Rob Herring Oct. 12, 2022, 4:08 p.m. UTC | #1
On Tue, Oct 11, 2022 at 10:29:24AM +0200, Sascha Hauer wrote:
> Following the example of samsung,picophy-dc-vol-level-adjust more
> phy tuning properties are added for configuring the remaining bitfields
> in the USBNC_n_PHY_CFG1 register.

All these properties really doesn't scale. These properties should go 
in the phy node as they are properties or the phy. There's no rule that 
you can only read properties from the driver's device node.

Rob
Sascha Hauer Oct. 13, 2022, 10:14 a.m. UTC | #2
On Wed, Oct 12, 2022 at 11:08:06AM -0500, Rob Herring wrote:
> On Tue, Oct 11, 2022 at 10:29:24AM +0200, Sascha Hauer wrote:
> > Following the example of samsung,picophy-dc-vol-level-adjust more
> > phy tuning properties are added for configuring the remaining bitfields
> > in the USBNC_n_PHY_CFG1 register.
> 
> All these properties really doesn't scale. These properties should go 
> in the phy node as they are properties or the phy. There's no rule that 
> you can only read properties from the driver's device node.

I understand and agree.

On i.MX8M we currently use the usb-nop-xceiv. I guess it's not an option
to just add these properties there, so we'll need a phy node with a new
compatible like fsl,imx8mm-usbphy. The driver would basically just
register a usb-nop-xceiv and the node would be a container for the new
property. Does this sound sane?

Sascha
Rob Herring Oct. 13, 2022, 8:03 p.m. UTC | #3
On Thu, Oct 13, 2022 at 12:14:12PM +0200, Sascha Hauer wrote:
> On Wed, Oct 12, 2022 at 11:08:06AM -0500, Rob Herring wrote:
> > On Tue, Oct 11, 2022 at 10:29:24AM +0200, Sascha Hauer wrote:
> > > Following the example of samsung,picophy-dc-vol-level-adjust more
> > > phy tuning properties are added for configuring the remaining bitfields
> > > in the USBNC_n_PHY_CFG1 register.
> > 
> > All these properties really doesn't scale. These properties should go 
> > in the phy node as they are properties or the phy. There's no rule that 
> > you can only read properties from the driver's device node.
> 
> I understand and agree.
> 
> On i.MX8M we currently use the usb-nop-xceiv. I guess it's not an option
> to just add these properties there, so we'll need a phy node with a new
> compatible like fsl,imx8mm-usbphy. The driver would basically just
> register a usb-nop-xceiv and the node would be a container for the new
> property. Does this sound sane?

I think it would be fine if you do:

compatible = "fsl,imx8mm-usbphy", "usb-nop-xceiv";

You'll have to rework the usb-nop-xceiv schema 'select' like we have to 
do for any compatible appearing in multiple schema files.

Or don't have the fallback and add "fsl,imx8mm-usbphy" to the 
phy-generic.c driver. But that should be marked for stable for at least 
some compatibility with old kernels.

For existing kernel binaries to work, you have to go with the former 
option.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 11d08ffeb1e9c..c467924235759 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -255,15 +255,94 @@  allOf:
           minimum: 0x0
           maximum: 0x3
 
+        samsung,picophy-usb-source-impedance-adjust:
+          description: |
+            USB Source Impedance Adjustment. In some applications, there can be
+            significant series resistance on the USB DP/DN path between the
+            USB_OTG*_DP/USB_OTG*_DN pins tns and the USB cable. This bus adjusts
+            the driver source impedance to compensate for that added resistance.
+            The default value is 0x1. For more details refer to TXRESTUNE0 bits of
+            USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x3
+
+        samsung,picophy-hs-rise-time-adjust:
+          description: |
+            This bus adjust the rise/fall times of the high-speed transmitter
+            waveform. The default value is 0x1. For more details refer to
+            TXRISETUNE0 bits of USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x3
+
         samsung,picophy-dc-vol-level-adjust:
           description: |
             HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
             level voltage. The range is from 0x0 to 0xf, the default value is
             0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
+
+        $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0xf
+
+        samsung,picophy-fs-ls-source-impedance-adjust:
+          description: |
+            FS/LS Source Impedance Adjustment. This bus adjusts the low- and
+            full-speed single-ended source impedance while driving high. The
+            adjustment values listed are based on nominal process, voltage, and
+            temperature conditions. The default value is 0x3. For more details
+            refer to TXFSLSTUNE0 bits of USBNC_n_PHY_CFG1.
+
           $ref: /schemas/types.yaml#/definitions/uint32
           minimum: 0x0
           maximum: 0xf
 
+        samsung,picophy-transmitter-hs-crossover-adjust:
+          description: |
+            Transmitter High-Speed Crossover Adjustment. This bus adjusts the
+            voltage at which the USB_OTG*_DP and USB_OTG*_DN signals cross
+            while transmitting in HS mode. The default value is 0x3. For more
+            details refer to TXHSXVTUNE0 bits of USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x3
+
+        samsung,picophy-vbus-valid-threshold-adjust:
+          description: |
+            VBUS Valid Threshold Adjustment. This bus adjust the voltage level
+            for the VBUS VALID threshold. The default value is 0x4. For more
+            details refer to OTGTUNE0 bits of USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x7
+
+        samsung,picophy-squelsh-threshold-adjust:
+          description: |
+            Squelch Threshold Adjustment. This bus adjusts the voltage level for
+            the receiver threshold used to detect valid high-speed data. The
+            default value is 0x3. For more details refer to SQRXTUNE0 bits of
+            USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x7
+
+        samsung,picophy-disconnect-threshold-adjust:
+          description: |
+            Disconnect Threshold Adjustment. This bus adjusts the voltage level for
+            the receiver threshold used to detect a disconnect event at the host.
+            The default value is 0x4. For more details refer to COMPDISTUNE0 bits of
+            USBNC_n_PHY_CFG1.
+
+          $ref: /schemas/types.yaml#/definitions/uint32
+          minimum: 0x0
+          maximum: 0x7
+
 additionalProperties: true
 
 examples: