| Message ID | 20220928-mdm9615-dt-schema-fixes-v4-4-dac2dfaac703@linaro.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 75353420d0d0abe3a57cedf4a6cfa00ea05842a3 |
| Headers | show |
| Series | arm: qcom: mdm9615: first round of bindings and DT fixes | expand |
On 21.10.2022 11:06, Neil Armstrong wrote: > The spi-max-frequency property has nothing to do in the controller's node, > remove it and fix the 'spi-max-frequency' was unexpected dtbs check error. > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad > arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi > index eaa3236f62db..366241dee522 100644 > --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi > +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi > @@ -170,7 +170,6 @@ gsbi3_spi: spi@16280000 { > #size-cells = <0>; > reg = <0x16280000 0x1000>; > interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; > - spi-max-frequency = <24000000>; > > clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>; > clock-names = "core", "iface"; >
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index eaa3236f62db..366241dee522 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -170,7 +170,6 @@ gsbi3_spi: spi@16280000 { #size-cells = <0>; reg = <0x16280000 0x1000>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - spi-max-frequency = <24000000>; clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>; clock-names = "core", "iface";