| Message ID | 20221021153128.44226-13-ayankuma@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Arm: Enable GICv3 for AArch32 | expand |
Hi, On 21/10/2022 16:31, Ayan Kumar Halder wrote: > Refer ARM DDI 0487G.b ID072021, > D13.2.86 - > ID_PFR1_EL1, AArch32 Processor Feature Register 1 > > GIC, bits[31:28] == 0b0001 for GIC3.0 on Aarch32 > > One can now enable GICv3 on AArch32 systems. > > Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com> > --- > xen/arch/arm/Kconfig | 2 +- > xen/arch/arm/include/asm/cpufeature.h | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 1fe5faf847..5eaf21b8e0 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -41,7 +41,7 @@ config ARM_EFI > > config GICV3 > bool "GICv3 driver" > - depends on ARM_64 && !NEW_VGIC > + depends on (ARM_64 || ARM_32) && !NEW_VGIC (ARM_64 || ARM_32) will always be true. So this can be dropped. Furthermore, I wonder whether we should update SUPPORT.md with the support state for GICv3 on 32-bit. I would be fine if we already mark it as "supported, not security supported". But I am not sure about security supported until further testing. Any opinions? Cheers,
diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 1fe5faf847..5eaf21b8e0 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -41,7 +41,7 @@ config ARM_EFI config GICV3 bool "GICv3 driver" - depends on ARM_64 && !NEW_VGIC + depends on (ARM_64 || ARM_32) && !NEW_VGIC default y ---help--- diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index c86a2e7f29..c8ca09d1c3 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -31,6 +31,7 @@ #define cpu_has_jazelle (boot_cpu_feature32(jazelle) > 0) #define cpu_has_thumbee (boot_cpu_feature32(thumbee) == 1) #define cpu_has_aarch32 (cpu_has_arm || cpu_has_thumb) +#define cpu_has_gicv3 (boot_cpu_feature32(gic) >= 1) #ifdef CONFIG_ARM_32 #define cpu_has_gentimer (boot_cpu_feature32(gentimer) == 1)
Refer ARM DDI 0487G.b ID072021, D13.2.86 - ID_PFR1_EL1, AArch32 Processor Feature Register 1 GIC, bits[31:28] == 0b0001 for GIC3.0 on Aarch32 One can now enable GICv3 on AArch32 systems. Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com> --- xen/arch/arm/Kconfig | 2 +- xen/arch/arm/include/asm/cpufeature.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)