diff mbox series

[net-next,1/6] arm64: dts: mediatek: mt7986: add support for RX Wireless Ethernet Dispatch

Message ID 27485d296c51aeae5a0c146e46df3f369d5be1ff.1666368566.git.lorenzo@kernel.org (mailing list archive)
State New, archived
Headers show
Series introduce WED RX support to MT7986 SoC | expand

Commit Message

Lorenzo Bianconi Oct. 21, 2022, 4:18 p.m. UTC 
Similar to TX Wireless Ethernet Dispatch, introduce RX Wireless Ethernet
Dispatch to offload traffic received by the wlan interface to lan/wan
one.

Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 79 +++++++++++++++++++++++
 1 file changed, 79 insertions(+)

Comments

kernel test robot Oct. 22, 2022, 4:03 p.m. UTC | #1 
Hi Lorenzo,

I love your patch! Yet something to improve:

[auto build test ERROR on net-next/master]

url:    https://github.com/intel-lab-lkp/linux/commits/Lorenzo-Bianconi/introduce-WED-RX-support-to-MT7986-SoC/20221022-002107
patch link:    https://lore.kernel.org/r/27485d296c51aeae5a0c146e46df3f369d5be1ff.1666368566.git.lorenzo%40kernel.org
patch subject: [PATCH net-next 1/6] arm64: dts: mediatek: mt7986: add support for RX Wireless Ethernet Dispatch
config: arm64-randconfig-r024-20221019
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 791a7ae1ba3efd6bca96338e10ffde557ba83920)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/0d8bdcf7c358e526380e691b7f7b0558836745e2
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Lorenzo-Bianconi/introduce-WED-RX-support-to-MT7986-SoC/20221022-002107
        git checkout 0d8bdcf7c358e526380e691b7f7b0558836745e2
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts:10.1-2 syntax error
   FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm64/boot/dts/mediatek/mt7986b.dtsi:9.1-5 syntax error
   FATAL ERROR: Unable to parse input tree
kernel test robot Oct. 22, 2022, 11:17 p.m. UTC | #2 
Hi Lorenzo,

I love your patch! Yet something to improve:

[auto build test ERROR on net-next/master]

url:    https://github.com/intel-lab-lkp/linux/commits/Lorenzo-Bianconi/introduce-WED-RX-support-to-MT7986-SoC/20221022-002107
patch link:    https://lore.kernel.org/r/27485d296c51aeae5a0c146e46df3f369d5be1ff.1666368566.git.lorenzo%40kernel.org
patch subject: [PATCH net-next 1/6] arm64: dts: mediatek: mt7986: add support for RX Wireless Ethernet Dispatch
config: arm64-allyesconfig
compiler: aarch64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/0d8bdcf7c358e526380e691b7f7b0558836745e2
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Lorenzo-Bianconi/introduce-WED-RX-support-to-MT7986-SoC/20221022-002107
        git checkout 0d8bdcf7c358e526380e691b7f7b0558836745e2
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts:10.1-2 syntax error
   FATAL ERROR: Unable to parse input tree
--
>> Error: arch/arm64/boot/dts/mediatek/mt7986b.dtsi:9.1-5 syntax error
   FATAL ERROR: Unable to parse input tree
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 72e0d9722e07..3ee26cd0f8a9 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -8,6 +8,7 @@ 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/mt7986-clk.h>
 #include <dt-bindings/reset/mt7986-resets.h>
+#include <dt-bindings/reset/ti-syscon.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -75,6 +76,20 @@  secmon_reserved: secmon@43000000 {
 		wmcpu_emi: wmcpu-reserved@4fc00000 {
 			no-map;
 			reg = <0 0x4fc00000 0 0x00100000>;
+
+		wocpu0_emi: wocpu0_emi@4fd00000 {
+			reg = <0 0x4fd00000 0 0x40000>;
+			no-map;
+		};
+
+		wocpu1_emi: wocpu1_emi@4fd40000 {
+			reg = <0 0x4fd40000 0 0x40000>;
+			no-map;
+		};
+
+		wocpu_data: wocpu_data@4fd80000 {
+			reg = <0 0x4fd80000 0 0x240000>;
+			no-map;
 		};
 	};
 
@@ -226,6 +241,12 @@  ethsys: syscon@15000000 {
 			 reg = <0 0x15000000 0 0x1000>;
 			 #clock-cells = <1>;
 			 #reset-cells = <1>;
+
+			ethsysrst: reset-controller {
+				compatible = "ti,syscon-reset";
+				#reset-cells = <1>;
+				ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>;
+			};
 		};
 
 		wed_pcie: wed-pcie@10003000 {
@@ -240,6 +261,12 @@  wed0: wed@15010000 {
 			reg = <0 0x15010000 0 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+			mediatek,wocpu_data = <&wocpu_data>;
+			mediatek,ap2woccif = <&ap2woccif0>;
+			mediatek,wocpu_ilm = <&wocpu0_ilm>;
+			mediatek,wocpu_dlm = <&wocpu0_dlm>;
+			mediatek,wocpu_emi = <&wocpu0_emi>;
+			mediatek,wocpu_boot = <&cpu_boot>;
 		};
 
 		wed1: wed@15011000 {
@@ -248,6 +275,58 @@  wed1: wed@15011000 {
 			reg = <0 0x15011000 0 0x1000>;
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+			mediatek,wocpu_data = <&wocpu_data>;
+			mediatek,ap2woccif = <&ap2woccif1>;
+			mediatek,wocpu_ilm = <&wocpu1_ilm>;
+			mediatek,wocpu_dlm = <&wocpu1_dlm>;
+			mediatek,wocpu_emi = <&wocpu1_emi>;
+			mediatek,wocpu_boot = <&cpu_boot>;
+		};
+
+		ap2woccif0: ap2woccif@151a5000 {
+			compatible = "mediatek,ap2woccif",
+				     "syscon";
+			reg = <0 0x151a5000 0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		ap2woccif1: ap2woccif@0x151ad000 {
+			compatible = "mediatek,ap2woccif",
+				     "syscon";
+			reg = <0 0x151ad000 0 0x1000>;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		wocpu0_ilm: wocpu0_ilm@151e0000 {
+			compatible = "mediatek,wocpu0_ilm";
+			reg = <0 0x151e0000 0 0x8000>;
+		};
+
+		wocpu1_ilm: wocpu1_ilm@151f0000 {
+			compatible = "mediatek,wocpu1_ilm";
+			reg = <0 0x151f0000 0 0x8000>;
+		};
+
+		wocpu0_dlm: wocpu_dlm@151e8000 {
+			compatible = "mediatek,wocpu_dlm";
+			reg = <0 0x151e8000 0 0x2000>;
+			resets = <&ethsysrst 0>;
+			reset-names = "wocpu_rst";
+		};
+
+		wocpu1_dlm: wocpu_dlm@0x151f8000 {
+			compatible = "mediatek,wocpu_dlm";
+			reg = <0 0x151f8000 0 0x2000>;
+			resets = <&ethsysrst 0>;
+			reset-names = "wocpu_rst";
+		};
+
+		cpu_boot: wocpu_boot@15194000 {
+			compatible = "mediatek,wocpu_boot",
+				     "syscon";
+			reg = <0 0x15194000 0 0x1000>;
 		};
 
 		eth: ethernet@15100000 {