diff mbox series

[RFC,5/9] iommu/arm-smmu-qcom: Move the qcom,adreno-smmu check into qcom_smmu_create

Message ID 20221021165534.2334329-6-dmitry.baryshkov@linaro.org (mailing list archive)
State New, archived
Headers show
Series iommy/arm-smmu-qcom: Rework Qualcomm SMMU bindings and implementation | expand

Commit Message

Dmitry Baryshkov Oct. 21, 2022, 4:55 p.m. UTC
Move special handling of qcom,adreno-smmu into qcom_smmu_create()
function. This allows us to further customize the Adreno SMMU
implementation.

Note, this also adds two entries to the qcom_smmu_impl_of_match table.
They were used with the qcom,adreno-smmu compat and were handled by the
removed clause.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 32 ++++++++++++----------
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h |  1 +
 2 files changed, 19 insertions(+), 14 deletions(-)

Comments

Sai Prakash Ranjan Oct. 27, 2022, 3:11 a.m. UTC | #1
On 10/21/2022 10:25 PM, Dmitry Baryshkov wrote:
> Move special handling of qcom,adreno-smmu into qcom_smmu_create()
> function. This allows us to further customize the Adreno SMMU
> implementation.
> 
> Note, this also adds two entries to the qcom_smmu_impl_of_match table.
> They were used with the qcom,adreno-smmu compat and were handled by the
> removed clause.
> 

Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 32 ++++++++++++----------
>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h |  1 +
>   2 files changed, 19 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index bd228b7d6817..c3bcd6eb2f42 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -407,13 +407,18 @@ static const struct arm_smmu_impl qcom_adreno_smmu_impl = {
>   static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
>   		const struct qcom_smmu_match_data *data)
>   {
> +	const struct device_node *np = smmu->dev->of_node;
>   	const struct arm_smmu_impl *impl;
>   	struct qcom_smmu *qsmmu;
>   
>   	if (!data)
>   		return ERR_PTR(-EINVAL);
>   
> -	impl = data->impl;
> +	if (np && of_device_is_compatible(np, "qcom,adreno-smmu"))
> +		impl = data->adreno_impl;
> +	else
> +		impl = data->impl;
> +
>   	if (!impl)
>   		return smmu;
>   
> @@ -431,15 +436,22 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
>   	return &qsmmu->smmu;
>   }
>   
> -static const struct qcom_smmu_match_data qcom_smmu_data = {
> -	.impl = &qcom_smmu_impl,
> +/*
> + * It is not yet possible to use MDP SMMU with the bypass quirk on the msm8996,
> + * there are not enough context banks.
> + */
> +static const struct qcom_smmu_match_data msm8996_smmu_data = {
> +	.impl = NULL,
> +	.adreno_impl = &qcom_adreno_smmu_impl,
>   };
>   
> -static const struct qcom_smmu_match_data qcom_adreno_smmu_data = {
> -	.impl = &qcom_adreno_smmu_impl,
> +static const struct qcom_smmu_match_data qcom_smmu_data = {
> +	.impl = &qcom_smmu_impl,
> +	.adreno_impl = &qcom_adreno_smmu_impl,
>   };
>   
>   static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
> +	{ .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
>   	{ .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_data },
> @@ -447,6 +459,7 @@ static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
>   	{ .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
> +	{ .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sdm845-smmu-500", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_data },
>   	{ .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_data },
> @@ -479,15 +492,6 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
>   	}
>   #endif
>   
> -	/*
> -	 * Do not change this order of implementation, i.e., first adreno
> -	 * smmu impl and then apss smmu since we can have both implementing
> -	 * arm,mmu-500 in which case we will miss setting adreno smmu specific
> -	 * features if the order is changed.
> -	 */
> -	if (of_device_is_compatible(np, "qcom,adreno-smmu"))
> -		return qcom_smmu_create(smmu, &qcom_adreno_smmu_data);
> -
>   	match = of_match_node(qcom_smmu_impl_of_match, np);
>   	if (match)
>   		return qcom_smmu_create(smmu, match->data);
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
> index 2424f10b7110..424d8d342ce0 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
> @@ -16,6 +16,7 @@ struct qcom_smmu {
>   
>   struct qcom_smmu_match_data {
>   	const struct arm_smmu_impl *impl;
> +	const struct arm_smmu_impl *adreno_impl;
>   };
>   
>   #ifdef CONFIG_ARM_SMMU_QCOM_DEBUG
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index bd228b7d6817..c3bcd6eb2f42 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -407,13 +407,18 @@  static const struct arm_smmu_impl qcom_adreno_smmu_impl = {
 static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
 		const struct qcom_smmu_match_data *data)
 {
+	const struct device_node *np = smmu->dev->of_node;
 	const struct arm_smmu_impl *impl;
 	struct qcom_smmu *qsmmu;
 
 	if (!data)
 		return ERR_PTR(-EINVAL);
 
-	impl = data->impl;
+	if (np && of_device_is_compatible(np, "qcom,adreno-smmu"))
+		impl = data->adreno_impl;
+	else
+		impl = data->impl;
+
 	if (!impl)
 		return smmu;
 
@@ -431,15 +436,22 @@  static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
 	return &qsmmu->smmu;
 }
 
-static const struct qcom_smmu_match_data qcom_smmu_data = {
-	.impl = &qcom_smmu_impl,
+/*
+ * It is not yet possible to use MDP SMMU with the bypass quirk on the msm8996,
+ * there are not enough context banks.
+ */
+static const struct qcom_smmu_match_data msm8996_smmu_data = {
+	.impl = NULL,
+	.adreno_impl = &qcom_adreno_smmu_impl,
 };
 
-static const struct qcom_smmu_match_data qcom_adreno_smmu_data = {
-	.impl = &qcom_adreno_smmu_impl,
+static const struct qcom_smmu_match_data qcom_smmu_data = {
+	.impl = &qcom_smmu_impl,
+	.adreno_impl = &qcom_adreno_smmu_impl,
 };
 
 static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
+	{ .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
 	{ .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_data },
@@ -447,6 +459,7 @@  static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
 	{ .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
+	{ .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sdm845-smmu-500", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_data },
 	{ .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_data },
@@ -479,15 +492,6 @@  struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
 	}
 #endif
 
-	/*
-	 * Do not change this order of implementation, i.e., first adreno
-	 * smmu impl and then apss smmu since we can have both implementing
-	 * arm,mmu-500 in which case we will miss setting adreno smmu specific
-	 * features if the order is changed.
-	 */
-	if (of_device_is_compatible(np, "qcom,adreno-smmu"))
-		return qcom_smmu_create(smmu, &qcom_adreno_smmu_data);
-
 	match = of_match_node(qcom_smmu_impl_of_match, np);
 	if (match)
 		return qcom_smmu_create(smmu, match->data);
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
index 2424f10b7110..424d8d342ce0 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
@@ -16,6 +16,7 @@  struct qcom_smmu {
 
 struct qcom_smmu_match_data {
 	const struct arm_smmu_impl *impl;
+	const struct arm_smmu_impl *adreno_impl;
 };
 
 #ifdef CONFIG_ARM_SMMU_QCOM_DEBUG