| Message ID | 7a454984f0001a71964114b71f353cb47af95ee6.1666368566.git.lorenzo@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | introduce WED RX support to MT7986 SoC | expand |
On Fri, 21 Oct 2022 18:18:32 +0200, Lorenzo Bianconi wrote: > Document the binding for the RX Wireless Ethernet Dispatch core on the > MT7986 ethernet driver used to offload traffic received by WLAN NIC and > forwarded to LAN/WAN one. > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > .../arm/mediatek/mediatek,mt7622-wed.yaml | 126 ++++++++++++++++++ > .../arm/mediatek/mediatek,mt7986-wo-boot.yaml | 45 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-ccif.yaml | 49 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-dlm.yaml | 66 +++++++++ > 4 files changed, 286 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,wocpu_boot:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,wocpu_ilm:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,ap2woccif:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,wocpu_dlm:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,wocpu_data:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml: properties:mediatek,wocpu_emi:maxItems: False schema does not allow 1 hint: Scalar properties should not have array keywords from schema $id: http://devicetree.org/meta-schemas/keywords.yaml# Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.example.dtb:0:0: /example-1/soc/syscon@15000000: failed to match any schema with compatible: ['mediatek,mt7986-ethsys', 'syscon'] Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.example.dtb:0:0: /example-1/soc/syscon@15000000/reset-controller: failed to match any schema with compatible: ['ti,syscon-reset'] Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.example.dtb:0:0: /example-1/soc/wocpu0_ilm@151e0000: failed to match any schema with compatible: ['mediatek,wocpu0_ilm'] Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.example.dtb:0:0: /example-0/soc/syscon@15000000: failed to match any schema with compatible: ['mediatek,mt7986-ethsys', 'syscon'] Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.example.dtb:0:0: /example-0/soc/syscon@15000000/reset-controller: failed to match any schema with compatible: ['ti,syscon-reset'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Fri, Oct 21, 2022 at 06:18:32PM +0200, Lorenzo Bianconi wrote: > Document the binding for the RX Wireless Ethernet Dispatch core on the > MT7986 ethernet driver used to offload traffic received by WLAN NIC and > forwarded to LAN/WAN one. > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > .../arm/mediatek/mediatek,mt7622-wed.yaml | 126 ++++++++++++++++++ > .../arm/mediatek/mediatek,mt7986-wo-boot.yaml | 45 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-ccif.yaml | 49 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-dlm.yaml | 66 +++++++++ > 4 files changed, 286 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > index 84fb0a146b6e..623f11df5545 100644 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > @@ -29,6 +29,59 @@ properties: > interrupts: > maxItems: 1 > > + mediatek,wocpu_emi: > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to a node describing reserved memory used by mtk wed firmware > + (see bindings/reserved-memory/reserved-memory.txt) What does that file contain? There's a standard property to refer to reserved-memory nodes, use it. > + > + mediatek,wocpu_data: > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to a node describing reserved memory used by mtk wed firmware > + (see bindings/reserved-memory/reserved-memory.txt) > + > + mediatek,wocpu_ilm: > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to a node describing memory used by mtk wed firmware > + > + mediatek,ap2woccif: > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to the mediatek wed-wo controller. > + > + mediatek,wocpu_boot: s/_/-/ > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to the mediatek wed-wo boot interface. > + > + mediatek,wocpu_dlm: > + $ref: /schemas/types.yaml#/definitions/phandle > + maxItems: 1 > + description: > + Phandle to the mediatek wed-wo rx hw ring. > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt7986-wed > + then: > + properties: > + mediatek,wocpu_data: true > + mediatek,wocpu_boot: true > + mediatek,wocpu_emi: true > + mediatek,wocpu_ilm: true > + mediatek,ap2woccif: true > + mediatek,wocpu_dlm: true > + > required: > - compatible > - reg > @@ -49,3 +102,76 @@ examples: > interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; > }; > }; > + > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/reset/ti-syscon.h> > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + wocpu0_emi: wocpu0_emi@4fd00000 { > + reg = <0 0x4fd00000 0 0x40000>; > + no-map; > + }; > + > + wocpu_data: wocpu_data@4fd80000 { > + reg = <0 0x4fd80000 0 0x240000>; > + no-map; > + }; > + }; > + > + ethsys: syscon@15000000 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "mediatek,mt7986-ethsys", "syscon"; > + reg = <0 0x15000000 0 0x1000>; > + > + #clock-cells = <1>; > + #reset-cells = <1>; > + ethsysrst: reset-controller { > + compatible = "ti,syscon-reset"; > + #reset-cells = <1>; > + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; > + }; You don't need to show providers in examples. Presumably we already have an example of them in their binding. > + }; > + > + wocpu0_ilm: wocpu0_ilm@151e0000 { > + compatible = "mediatek,wocpu0_ilm"; > + reg = <0 0x151e0000 0 0x8000>; > + }; > + > + cpu_boot: wocpu_boot@15194000 { > + compatible = "mediatek,wocpu_boot", "syscon"; > + reg = <0 0x15194000 0 0x1000>; > + }; > + > + ap2woccif0: ap2woccif@151a5000 { > + compatible = "mediatek,ap2woccif", "syscon"; > + reg = <0 0x151a5000 0 0x1000>; > + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > + wocpu0_dlm: wocpu_dlm@151e8000 { > + compatible = "mediatek,wocpu_dlm"; > + reg = <0 0x151e8000 0 0x2000>; > + resets = <ðsysrst 0>; > + reset-names = "wocpu_rst"; > + }; > + > + wed1: wed@1020a000 { > + compatible = "mediatek,mt7986-wed","syscon"; > + reg = <0 0x15010000 0 0x1000>; > + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; > + > + mediatek,wocpu_data = <&wocpu_data>; > + mediatek,ap2woccif = <&ap2woccif0>; > + mediatek,wocpu_ilm = <&wocpu0_ilm>; > + mediatek,wocpu_dlm = <&wocpu0_dlm>; > + mediatek,wocpu_emi = <&wocpu_emi>; > + mediatek,wocpu_boot = <&cpu_boot>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > new file mode 100644 > index 000000000000..dc8fdb706960 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-boot.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: MediaTek WED WO boot controller interface for MT7986 What is 'WED'? > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + - Felix Fietkau <nbd@nbd.name> > + > +description: > + The mediatek wo-boot provides a configuration interface for WED WO > + boot controller on MT7986 soc. > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,wocpu_boot This needs to be SoC specific. And s/_/-/ > + - const: syscon > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + cpu_boot: wocpu_boot@15194000 { > + compatible = "mediatek,wocpu_boot", "syscon"; > + reg = <0 0x15194000 0 0x1000>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > new file mode 100644 > index 000000000000..8fea86425983 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > @@ -0,0 +1,49 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-ccif.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: MediaTek WED WO Controller for MT7986 > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + - Felix Fietkau <nbd@nbd.name> > + > +description: > + The mediatek WO-ccif provides a configuration interface for WED WO > + controller on MT7986 soc. > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,ap2woccif SoC specific. > + - const: syscon > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + ap2woccif0: ap2woccif@151a5000 { > + compatible = "mediatek,ap2woccif", "syscon"; > + reg = <0 0x151a5000 0 0x1000>; > + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > new file mode 100644 > index 000000000000..529343c57e4b > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-dlm.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: MediaTek WED WO hw rx ring interface for MT7986 > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + - Felix Fietkau <nbd@nbd.name> > + > +description: > + The mediatek WO-dlm provides a configuration interface for WED WO > + rx ring on MT7986 soc. > + > +properties: > + compatible: > + const: mediatek,wocpu_dlm Soc specific s/_/-/ > + > + reg: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + reset-names: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - resets > + - reset-names > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/reset/ti-syscon.h> > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + ethsys: syscon@15000000 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "mediatek,mt7986-ethsys", "syscon"; > + reg = <0 0x15000000 0 0x1000>; > + > + #clock-cells = <1>; > + #reset-cells = <1>; > + ethsysrst: reset-controller { > + compatible = "ti,syscon-reset"; > + #reset-cells = <1>; > + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; > + }; > + }; Again, don't need the provider here. > + > + wocpu0_dlm: wocpu_dlm@151e8000 { > + compatible = "mediatek,wocpu_dlm"; > + reg = <0 0x151e8000 0 0x2000>; > + resets = <ðsysrst 0>; > + reset-names = "wocpu_rst"; > + }; > + }; > -- > 2.37.3 > >
> On Fri, Oct 21, 2022 at 06:18:32PM +0200, Lorenzo Bianconi wrote: > > Document the binding for the RX Wireless Ethernet Dispatch core on the > > MT7986 ethernet driver used to offload traffic received by WLAN NIC and > > forwarded to LAN/WAN one. > > > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > > --- > > .../arm/mediatek/mediatek,mt7622-wed.yaml | 126 ++++++++++++++++++ > > .../arm/mediatek/mediatek,mt7986-wo-boot.yaml | 45 +++++++ > > .../arm/mediatek/mediatek,mt7986-wo-ccif.yaml | 49 +++++++ > > .../arm/mediatek/mediatek,mt7986-wo-dlm.yaml | 66 +++++++++ > > 4 files changed, 286 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > > > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > > index 84fb0a146b6e..623f11df5545 100644 > > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml > > @@ -29,6 +29,59 @@ properties: > > interrupts: > > maxItems: 1 > > > > + mediatek,wocpu_emi: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to a node describing reserved memory used by mtk wed firmware > > + (see bindings/reserved-memory/reserved-memory.txt) > > What does that file contain? > > There's a standard property to refer to reserved-memory nodes, use it. ack, I will fix it in v2. > > > + > > + mediatek,wocpu_data: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to a node describing reserved memory used by mtk wed firmware > > + (see bindings/reserved-memory/reserved-memory.txt) > > + > > + mediatek,wocpu_ilm: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to a node describing memory used by mtk wed firmware > > + > > + mediatek,ap2woccif: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to the mediatek wed-wo controller. > > + > > + mediatek,wocpu_boot: > > s/_/-/ ack, I will fix it in v2. > > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to the mediatek wed-wo boot interface. > > + > > + mediatek,wocpu_dlm: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: > > + Phandle to the mediatek wed-wo rx hw ring. > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: mediatek,mt7986-wed > > + then: > > + properties: > > + mediatek,wocpu_data: true > > + mediatek,wocpu_boot: true > > + mediatek,wocpu_emi: true > > + mediatek,wocpu_ilm: true > > + mediatek,ap2woccif: true > > + mediatek,wocpu_dlm: true > > + > > required: > > - compatible > > - reg > > @@ -49,3 +102,76 @@ examples: > > interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; > > }; > > }; > > + > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/interrupt-controller/irq.h> > > + #include <dt-bindings/reset/ti-syscon.h> > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + reserved-memory { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + wocpu0_emi: wocpu0_emi@4fd00000 { > > + reg = <0 0x4fd00000 0 0x40000>; > > + no-map; > > + }; > > + > > + wocpu_data: wocpu_data@4fd80000 { > > + reg = <0 0x4fd80000 0 0x240000>; > > + no-map; > > + }; > > + }; > > + > > + ethsys: syscon@15000000 { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + compatible = "mediatek,mt7986-ethsys", "syscon"; > > + reg = <0 0x15000000 0 0x1000>; > > + > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + ethsysrst: reset-controller { > > + compatible = "ti,syscon-reset"; > > + #reset-cells = <1>; > > + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; > > + }; > > You don't need to show providers in examples. Presumably we already have > an example of them in their binding. ack, I will fix it in v2. > > > + }; > > + > > + wocpu0_ilm: wocpu0_ilm@151e0000 { > > + compatible = "mediatek,wocpu0_ilm"; > > + reg = <0 0x151e0000 0 0x8000>; > > + }; > > + > > + cpu_boot: wocpu_boot@15194000 { > > + compatible = "mediatek,wocpu_boot", "syscon"; > > + reg = <0 0x15194000 0 0x1000>; > > + }; > > + > > + ap2woccif0: ap2woccif@151a5000 { > > + compatible = "mediatek,ap2woccif", "syscon"; > > + reg = <0 0x151a5000 0 0x1000>; > > + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + > > + wocpu0_dlm: wocpu_dlm@151e8000 { > > + compatible = "mediatek,wocpu_dlm"; > > + reg = <0 0x151e8000 0 0x2000>; > > + resets = <ðsysrst 0>; > > + reset-names = "wocpu_rst"; > > + }; > > + > > + wed1: wed@1020a000 { > > + compatible = "mediatek,mt7986-wed","syscon"; > > + reg = <0 0x15010000 0 0x1000>; > > + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; > > + > > + mediatek,wocpu_data = <&wocpu_data>; > > + mediatek,ap2woccif = <&ap2woccif0>; > > + mediatek,wocpu_ilm = <&wocpu0_ilm>; > > + mediatek,wocpu_dlm = <&wocpu0_dlm>; > > + mediatek,wocpu_emi = <&wocpu_emi>; > > + mediatek,wocpu_boot = <&cpu_boot>; > > + }; > > + }; > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > > new file mode 100644 > > index 000000000000..dc8fdb706960 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > > @@ -0,0 +1,45 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-boot.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: MediaTek WED WO boot controller interface for MT7986 > > What is 'WED'? Wireless Ethernet Dispatch. I will fix it in v2. > > > + > > +maintainers: > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > + - Felix Fietkau <nbd@nbd.name> > > + > > +description: > > + The mediatek wo-boot provides a configuration interface for WED WO > > + boot controller on MT7986 soc. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,wocpu_boot > > This needs to be SoC specific. > > And s/_/-/ ack, I will fix it in v2. > > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + cpu_boot: wocpu_boot@15194000 { > > + compatible = "mediatek,wocpu_boot", "syscon"; > > + reg = <0 0x15194000 0 0x1000>; > > + }; > > + }; > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > > new file mode 100644 > > index 000000000000..8fea86425983 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > > @@ -0,0 +1,49 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-ccif.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: MediaTek WED WO Controller for MT7986 > > + > > +maintainers: > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > + - Felix Fietkau <nbd@nbd.name> > > + > > +description: > > + The mediatek WO-ccif provides a configuration interface for WED WO > > + controller on MT7986 soc. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,ap2woccif > > SoC specific. ack, I will fix it in v2. > > > + - const: syscon > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/interrupt-controller/irq.h> > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ap2woccif0: ap2woccif@151a5000 { > > + compatible = "mediatek,ap2woccif", "syscon"; > > + reg = <0 0x151a5000 0 0x1000>; > > + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + }; > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > > new file mode 100644 > > index 000000000000..529343c57e4b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > > @@ -0,0 +1,66 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-dlm.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: MediaTek WED WO hw rx ring interface for MT7986 > > + > > +maintainers: > > + - Lorenzo Bianconi <lorenzo@kernel.org> > > + - Felix Fietkau <nbd@nbd.name> > > + > > +description: > > + The mediatek WO-dlm provides a configuration interface for WED WO > > + rx ring on MT7986 soc. > > + > > +properties: > > + compatible: > > + const: mediatek,wocpu_dlm > > Soc specific > > s/_/-/ ack, I will fix it in v2. > > > + > > + reg: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + > > + reset-names: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - resets > > + - reset-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/reset/ti-syscon.h> > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + ethsys: syscon@15000000 { > > + #address-cells = <1>; > > + #size-cells = <1>; > > + compatible = "mediatek,mt7986-ethsys", "syscon"; > > + reg = <0 0x15000000 0 0x1000>; > > + > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + ethsysrst: reset-controller { > > + compatible = "ti,syscon-reset"; > > + #reset-cells = <1>; > > + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; > > + }; > > + }; > > Again, don't need the provider here. ack, I will fix it in v2. Regards, Lorenzo > > > + > > + wocpu0_dlm: wocpu_dlm@151e8000 { > > + compatible = "mediatek,wocpu_dlm"; > > + reg = <0 0x151e8000 0 0x2000>; > > + resets = <ðsysrst 0>; > > + reset-names = "wocpu_rst"; > > + }; > > + }; > > -- > > 2.37.3 > > > >
On 21/10/2022 12:18, Lorenzo Bianconi wrote: > Document the binding for the RX Wireless Ethernet Dispatch core on the > MT7986 ethernet driver used to offload traffic received by WLAN NIC and > forwarded to LAN/WAN one. > > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > .../arm/mediatek/mediatek,mt7622-wed.yaml | 126 ++++++++++++++++++ > .../arm/mediatek/mediatek,mt7986-wo-boot.yaml | 45 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-ccif.yaml | 49 +++++++ > .../arm/mediatek/mediatek,mt7986-wo-dlm.yaml | 66 +++++++++ > 4 files changed, 286 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC. It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. (...) > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + ap2woccif0: ap2woccif@151a5000 { Node names should be generic. https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation In other places as well. > + compatible = "mediatek,ap2woccif", "syscon"; > + reg = <0 0x151a5000 0 0x1000>; > + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > new file mode 100644 > index 000000000000..529343c57e4b > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-dlm.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" Drop quotes from both lines. > + > +title: MediaTek WED WO hw rx ring interface for MT7986 > + > +maintainers: > + - Lorenzo Bianconi <lorenzo@kernel.org> > + - Felix Fietkau <nbd@nbd.name> > + > +description: > + The mediatek WO-dlm provides a configuration interface for WED WO > + rx ring on MT7986 soc. > + > +properties: > + compatible: > + const: mediatek,wocpu_dlm No underscores in compatibles (and node names, but I think Rob commented about it) Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml index 84fb0a146b6e..623f11df5545 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml @@ -29,6 +29,59 @@ properties: interrupts: maxItems: 1 + mediatek,wocpu_emi: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to a node describing reserved memory used by mtk wed firmware + (see bindings/reserved-memory/reserved-memory.txt) + + mediatek,wocpu_data: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to a node describing reserved memory used by mtk wed firmware + (see bindings/reserved-memory/reserved-memory.txt) + + mediatek,wocpu_ilm: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to a node describing memory used by mtk wed firmware + + mediatek,ap2woccif: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to the mediatek wed-wo controller. + + mediatek,wocpu_boot: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to the mediatek wed-wo boot interface. + + mediatek,wocpu_dlm: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: + Phandle to the mediatek wed-wo rx hw ring. + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt7986-wed + then: + properties: + mediatek,wocpu_data: true + mediatek,wocpu_boot: true + mediatek,wocpu_emi: true + mediatek,wocpu_ilm: true + mediatek,ap2woccif: true + mediatek,wocpu_dlm: true + required: - compatible - reg @@ -49,3 +102,76 @@ examples: interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; }; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/reset/ti-syscon.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + wocpu0_emi: wocpu0_emi@4fd00000 { + reg = <0 0x4fd00000 0 0x40000>; + no-map; + }; + + wocpu_data: wocpu_data@4fd80000 { + reg = <0 0x4fd80000 0 0x240000>; + no-map; + }; + }; + + ethsys: syscon@15000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mediatek,mt7986-ethsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + + #clock-cells = <1>; + #reset-cells = <1>; + ethsysrst: reset-controller { + compatible = "ti,syscon-reset"; + #reset-cells = <1>; + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; + }; + }; + + wocpu0_ilm: wocpu0_ilm@151e0000 { + compatible = "mediatek,wocpu0_ilm"; + reg = <0 0x151e0000 0 0x8000>; + }; + + cpu_boot: wocpu_boot@15194000 { + compatible = "mediatek,wocpu_boot", "syscon"; + reg = <0 0x15194000 0 0x1000>; + }; + + ap2woccif0: ap2woccif@151a5000 { + compatible = "mediatek,ap2woccif", "syscon"; + reg = <0 0x151a5000 0 0x1000>; + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; + }; + + wocpu0_dlm: wocpu_dlm@151e8000 { + compatible = "mediatek,wocpu_dlm"; + reg = <0 0x151e8000 0 0x2000>; + resets = <ðsysrst 0>; + reset-names = "wocpu_rst"; + }; + + wed1: wed@1020a000 { + compatible = "mediatek,mt7986-wed","syscon"; + reg = <0 0x15010000 0 0x1000>; + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; + + mediatek,wocpu_data = <&wocpu_data>; + mediatek,ap2woccif = <&ap2woccif0>; + mediatek,wocpu_ilm = <&wocpu0_ilm>; + mediatek,wocpu_dlm = <&wocpu0_dlm>; + mediatek,wocpu_emi = <&wocpu_emi>; + mediatek,wocpu_boot = <&cpu_boot>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml new file mode 100644 index 000000000000..dc8fdb706960 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-boot.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediaTek WED WO boot controller interface for MT7986 + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + - Felix Fietkau <nbd@nbd.name> + +description: + The mediatek wo-boot provides a configuration interface for WED WO + boot controller on MT7986 soc. + +properties: + compatible: + items: + - enum: + - mediatek,wocpu_boot + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + cpu_boot: wocpu_boot@15194000 { + compatible = "mediatek,wocpu_boot", "syscon"; + reg = <0 0x15194000 0 0x1000>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml new file mode 100644 index 000000000000..8fea86425983 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-ccif.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediaTek WED WO Controller for MT7986 + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + - Felix Fietkau <nbd@nbd.name> + +description: + The mediatek WO-ccif provides a configuration interface for WED WO + controller on MT7986 soc. + +properties: + compatible: + items: + - enum: + - mediatek,ap2woccif + - const: syscon + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + ap2woccif0: ap2woccif@151a5000 { + compatible = "mediatek,ap2woccif", "syscon"; + reg = <0 0x151a5000 0 0x1000>; + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml new file mode 100644 index 000000000000..529343c57e4b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wo-dlm.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: MediaTek WED WO hw rx ring interface for MT7986 + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + - Felix Fietkau <nbd@nbd.name> + +description: + The mediatek WO-dlm provides a configuration interface for WED WO + rx ring on MT7986 soc. + +properties: + compatible: + const: mediatek,wocpu_dlm + + reg: + maxItems: 1 + + resets: + maxItems: 1 + + reset-names: + maxItems: 1 + +required: + - compatible + - reg + - resets + - reset-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/ti-syscon.h> + soc { + #address-cells = <2>; + #size-cells = <2>; + + ethsys: syscon@15000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mediatek,mt7986-ethsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + + #clock-cells = <1>; + #reset-cells = <1>; + ethsysrst: reset-controller { + compatible = "ti,syscon-reset"; + #reset-cells = <1>; + ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>; + }; + }; + + wocpu0_dlm: wocpu_dlm@151e8000 { + compatible = "mediatek,wocpu_dlm"; + reg = <0 0x151e8000 0 0x2000>; + resets = <ðsysrst 0>; + reset-names = "wocpu_rst"; + }; + };
Document the binding for the RX Wireless Ethernet Dispatch core on the MT7986 ethernet driver used to offload traffic received by WLAN NIC and forwarded to LAN/WAN one. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- .../arm/mediatek/mediatek,mt7622-wed.yaml | 126 ++++++++++++++++++ .../arm/mediatek/mediatek,mt7986-wo-boot.yaml | 45 +++++++ .../arm/mediatek/mediatek,mt7986-wo-ccif.yaml | 49 +++++++ .../arm/mediatek/mediatek,mt7986-wo-dlm.yaml | 66 +++++++++ 4 files changed, 286 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-boot.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-ccif.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wo-dlm.yaml