| Message ID | 20221013112336.15438-3-johnson.wang@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce MediaTek frequency hopping driver | expand |
Quoting Johnson Wang (2022-10-13 04:23:34) > Add the new binding documentation for MediaTek frequency hopping > and spread spectrum clocking control. > > Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > .../arm/mediatek/mediatek,mt8186-fhctl.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > new file mode 100644 > index 000000000000..59111946966c > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-fhctl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek frequency hopping and spread spectrum clocking control The driver patch is in drivers/clk so why not put the binding in bindings/clock as well? > + > +maintainers: > + - Edward-JW Yang <edward-jw.yang@mediatek.com> > + [...] > + > +required: > + - compatible > + - reg > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8186-clk.h> > + fhctl: fhctl@1000ce00 { Is it a clock-controller? 'fhctl' isn't a generic node name. > + compatible = "mediatek,mt8186-fhctl"; > + reg = <0x1000ce00 0x200>; > + clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; > + mediatek,hopping-ssc-percent = <3>;
On Fri, 2022-10-14 at 13:42 -0700, Stephen Boyd wrote: > Quoting Johnson Wang (2022-10-13 04:23:34) > > Add the new binding documentation for MediaTek frequency hopping > > and spread spectrum clocking control. > > > > Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > > Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > Reviewed-by: Rob Herring <robh@kernel.org> > > --- > > .../arm/mediatek/mediatek,mt8186-fhctl.yaml | 53 > > +++++++++++++++++++ > > 1 file changed, 53 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186- > > fhctl.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186- > > fhctl.yaml > > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186- > > fhctl.yaml > > new file mode 100644 > > index 000000000000..59111946966c > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186- > > fhctl.yaml > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-fhctl.yaml*__;Iw!!CTRNKA9wMg0ARbw!yfDH4W14Pek7w3YBrdcBAGj3OSSWGlWk8av4DmHT69Ej4ax75zKqpy89ZvX1Z_aKDPzu$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!yfDH4W14Pek7w3YBrdcBAGj3OSSWGlWk8av4DmHT69Ej4ax75zKqpy89ZvX1Z9gRczPi$ > > > > + > > +title: MediaTek frequency hopping and spread spectrum clocking > > control > > The driver patch is in drivers/clk so why not put the binding in > bindings/clock as well? > Hi Stephen, Sure, I will move this binding in the next version. > > + > > +maintainers: > > + - Edward-JW Yang <edward-jw.yang@mediatek.com> > > + > > [...] > > + > > +required: > > + - compatible > > + - reg > > + - clocks > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/mt8186-clk.h> > > + fhctl: fhctl@1000ce00 { > > Is it a clock-controller? 'fhctl' isn't a generic node name. > This node is used for determining if PLLs adopt "hopping" method to adjust their frequency. It doesn't provide any clock but actually change the behavior of some PLLs with new .set_rate callback. Do you think this node acts like one kind of clock-controller? BRs, Johnson Wang > > + compatible = "mediatek,mt8186-fhctl"; > > + reg = <0x1000ce00 0x200>; > > + clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; > > + mediatek,hopping-ssc-percent = <3>;
On Mon, 2022-10-17 at 12:04 -0700, Stephen Boyd wrote: > Quoting Johnson Wang (王聖鑫) (2022-10-17 05:55:09) > > On Fri, 2022-10-14 at 13:42 -0700, Stephen Boyd wrote: > > > Quoting Johnson Wang (2022-10-13 04:23:34) > > > > + - | > > > > + #include <dt-bindings/clock/mt8186-clk.h> > > > > + fhctl: fhctl@1000ce00 { > > > > > > Is it a clock-controller? 'fhctl' isn't a generic node name. > > > > > > > This node is used for determining if PLLs adopt "hopping" method to > > adjust their frequency. > > It doesn't provide any clock but actually change the behavior of > > some > > PLLs with new .set_rate callback. > > Do you think this node acts like one kind of clock-controller? > > Why can't we add the reg and properties to the node that implements > the > PLL? Hi Stephen, Now we use standard clocks property to get clock indices from apmixedsys node. If we integrate the reg and properties into apmixedsys node, we have to figure out another way to get indices... (I think one node shouldn't take itself as input?) There is an idea in my mind. Add these prperties into apmixedsys node. mediatek,hopping-clocks = <CLK_APMIXED_MAINPLL>, <CLK_APMIXED_MSDCPLL>; mediatek,ssc-percent = <2 3>; But I don't really know if this violates some rules. Could you please give us some suggestion? Thanks! BRs, Johnson Wang
On Fri, 2022-10-21 at 11:17 +0000, Johnson Wang (王聖鑫) wrote: > On Mon, 2022-10-17 at 12:04 -0700, Stephen Boyd wrote: > > Quoting Johnson Wang (王聖鑫) (2022-10-17 05:55:09) > > > On Fri, 2022-10-14 at 13:42 -0700, Stephen Boyd wrote: > > > > Quoting Johnson Wang (2022-10-13 04:23:34) > > > > > + - | > > > > > + #include <dt-bindings/clock/mt8186-clk.h> > > > > > + fhctl: fhctl@1000ce00 { > > > > > > > > Is it a clock-controller? 'fhctl' isn't a generic node name. > > > > > > > > > > This node is used for determining if PLLs adopt "hopping" method > > > to > > > adjust their frequency. > > > It doesn't provide any clock but actually change the behavior of > > > some > > > PLLs with new .set_rate callback. > > > Do you think this node acts like one kind of clock-controller? > > > > Why can't we add the reg and properties to the node that implements > > the > > PLL? > > Hi Stephen, > > Now we use standard clocks property to get clock indices from > apmixedsys node. > > If we integrate the reg and properties into apmixedsys node, we have > to > figure out another way to get indices... (I think one node shouldn't > take itself as input?) > > There is an idea in my mind. Add these prperties into apmixedsys > node. > > mediatek,hopping-clocks = <CLK_APMIXED_MAINPLL>, > <CLK_APMIXED_MSDCPLL>; > mediatek,ssc-percent = <2 3>; > > > But I don't really know if this violates some rules. > Could you please give us some suggestion? > Thanks! > > BRs, > Johnson Wang Hi Stephen, A gentle ping for this. Could you please give me some advices if you prefer intergrating these into one node? Thank you very much! BRs, Johnson Wang
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml new file mode 100644 index 000000000000..59111946966c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-fhctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek frequency hopping and spread spectrum clocking control + +maintainers: + - Edward-JW Yang <edward-jw.yang@mediatek.com> + +description: | + Frequency hopping control (FHCTL) is a piece of hardware that control + some PLLs to adopt "hopping" mechanism to adjust their frequency. + Spread spectrum clocking (SSC) is another function provided by this hardware. + +properties: + compatible: + const: mediatek,mt8186-fhctl + + reg: + maxItems: 1 + + clocks: + description: Phandles of the PLL with FHCTL hardware capability. + minItems: 1 + maxItems: 30 + + mediatek,hopping-ssc-percent: + description: The percentage of spread spectrum clocking for one PLL. + minItems: 1 + maxItems: 30 + items: + default: 0 + minimum: 0 + maximum: 8 + +required: + - compatible + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8186-clk.h> + fhctl: fhctl@1000ce00 { + compatible = "mediatek,mt8186-fhctl"; + reg = <0x1000ce00 0x200>; + clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; + mediatek,hopping-ssc-percent = <3>; + };