| Message ID | Y1wd6ZJ8LdJpCfZL@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [PULL] drm-intel-next | expand |
On Fri, Oct 28, 2022 at 02:22:33PM -0400, Rodrigo Vivi wrote: > Hi Dave and Daniel, > > Here goes the first chunk of drm-intel-next targeting 6.2 > > The highlight goes to Ville with many display related clean-up > and improvement, some other MTL enabling work and many other > fixes and small clean-ups. > > drm-intel-next-2022-10-28: ... > - ELD precompute and readout (Ville) A slight clarification seems to be in order. The ELD precompute+readout is in fact not in yet. This was just a pile of cleanups and minor fixes. The real ELD stuff will come later, once we figure out how we actually want to do it.
On Sat, 2022-10-29 at 02:41 +0300, Ville Syrjälä wrote: > On Fri, Oct 28, 2022 at 02:22:33PM -0400, Rodrigo Vivi wrote: > > Hi Dave and Daniel, > > > > Here goes the first chunk of drm-intel-next targeting 6.2 > > > > The highlight goes to Ville with many display related clean-up > > and improvement, some other MTL enabling work and many other > > fixes and small clean-ups. > > > > drm-intel-next-2022-10-28: > ... > > - ELD precompute and readout (Ville) > > A slight clarification seems to be in order. The ELD > precompute+readout is in fact not in yet. This was just a pile > of cleanups and minor fixes. The real ELD stuff will come later, > once we figure out how we actually want to do it. Sorry for the confusion. I have just used the subject of your series as summary: [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Should I change that to ELD precompute and readout >
On Tue, Nov 01, 2022 at 10:29:24PM +0000, Vivi, Rodrigo wrote: > On Sat, 2022-10-29 at 02:41 +0300, Ville Syrjälä wrote: > > On Fri, Oct 28, 2022 at 02:22:33PM -0400, Rodrigo Vivi wrote: > > > Hi Dave and Daniel, > > > > > > Here goes the first chunk of drm-intel-next targeting 6.2 > > > > > > The highlight goes to Ville with many display related clean-up > > > and improvement, some other MTL enabling work and many other > > > fixes and small clean-ups. > > > > > > drm-intel-next-2022-10-28: > > ... > > > - ELD precompute and readout (Ville) > > > > A slight clarification seems to be in order. The ELD > > precompute+readout is in fact not in yet. This was just a pile > > of cleanups and minor fixes. The real ELD stuff will come later, > > once we figure out how we actually want to do it. > > Sorry for the confusion. I have just used the subject of your series > as summary: > [Intel-gfx] [PATCH 00/22] drm/i915: ELD precompute and readout Only part of the series went in. > > Should I change that to ELD precompute and readout Just "audio cleanups" or something like that would be the approximate truth.
Hi Dave and Daniel, Here goes the first chunk of drm-intel-next targeting 6.2 The highlight goes to Ville with many display related clean-up and improvement, some other MTL enabling work and many other fixes and small clean-ups. drm-intel-next-2022-10-28: - Hotplug code clean-up and organization (Jani, Gustavo) - More VBT specific code clean-up, doc, organization, and improvements (Ville) - More MTL enabling work (Matt, RK, Anusha, Jose) - FBC related clean-ups and improvements (Ville) - Removing unused sw_fence_await_reservation (Niranjana) - Big chunch of display house clean-up (Ville) - Many Watermark fixes and clean-ups (Ville) - Fix device info for devices without display (Jani) - Fix TC port PLLs after readout (Ville) - DPLL ID clean-ups (Ville) - Prep work for finishing (de)gamma readout (Ville) - PSR fixes and improvements (Jouni, Jose) - Reject excessive dotclocks early (Ville) - DRRS related improvements (Ville) - Simplify uncore register updates (Andrzej) - Fix simulated GPU reset wrt. encoder HW readout (Imre) - Add a ADL-P workaround (Jose) - Fix clear mask in GEN7_MISCCPCTL update (Andrzej) - Temporarily disable runtime_pm for discrete (Anshuman) - Improve fbdev debugs (Nirmoy) - Fix DP FRL link training status (Ankit) - Other small display fixes (Ankit, Suraj) - Allow panel fixed modes to have differing sync polarities (Ville) - Clean up crtc state flag checks (Ville) - Fix race conditions during DKL PHY accesses (Imre) - Prep-work for cdclock squash and crawl modes (Anusha) - ELD precompute and readout (Ville) Thanks, Rodrigo. The following changes since commit 21f0b7dabf9c358e75a539b5554c0375bf1abe0a: drm/i915: Fix return type of mode_valid function hook (2022-09-15 10:28:55 +0300) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2022-10-28 for you to fetch changes up to a6ebd538364b1e9e6048faaafbc0188172ed50c3: drm/i915/sdvo: Fix debug print (2022-10-28 14:46:21 +0300) ---------------------------------------------------------------- - Hotplug code clean-up and organization (Jani, Gustavo) - More VBT specific code clean-up, doc, organization, and improvements (Ville) - More MTL enabling work (Matt, RK, Anusha, Jose) - FBC related clean-ups and improvements (Ville) - Removing unused sw_fence_await_reservation (Niranjana) - Big chunch of display house clean-up (Ville) - Many Watermark fixes and clean-ups (Ville) - Fix device info for devices without display (Jani) - Fix TC port PLLs after readout (Ville) - DPLL ID clean-ups (Ville) - Prep work for finishing (de)gamma readout (Ville) - PSR fixes and improvements (Jouni, Jose) - Reject excessive dotclocks early (Ville) - DRRS related improvements (Ville) - Simplify uncore register updates (Andrzej) - Fix simulated GPU reset wrt. encoder HW readout (Imre) - Add a ADL-P workaround (Jose) - Fix clear mask in GEN7_MISCCPCTL update (Andrzej) - Temporarily disable runtime_pm for discrete (Anshuman) - Improve fbdev debugs (Nirmoy) - Fix DP FRL link training status (Ankit) - Other small display fixes (Ankit, Suraj) - Allow panel fixed modes to have differing sync polarities (Ville) - Clean up crtc state flag checks (Ville) - Fix race conditions during DKL PHY accesses (Imre) - Prep-work for cdclock squash and crawl modes (Anusha) - ELD precompute and readout (Ville) ---------------------------------------------------------------- Alan Previn (1): drm/i915/pxp: Add firmware status when ARB session fails Andrzej Hajda (5): drm/i915/display: remove drm_device aliases drm/i915/display: Use intel_uncore alias if defined drm/i915: make intel_uncore_rmw() write unconditionally drm/i915: use proper helper for register updates drm/i915: fix clear mask in GEN7_MISCCPCTL update Ankit Nautiyal (2): drm/i915/dp: Reset frl trained flag before restarting FRL training drm/i915/dp: Remove whitespace at the end of function. Anshuman Gupta (1): drm/i915/dgfx: Keep PCI autosuspend control 'on' by default on all dGPU Anusha Srivatsa (5): drm/i915/display: Add DC5 counter and DMC debugfs entries for MTL drm/i915/display: Change terminology for cdclk actions drm/i915/display: Introduce HAS_CDCLK_SQUASH macro drm/i915/display: Move chunks of code out of bxt_set_cdclk() drm/i915/display: Move squash_ctl register programming to its own function Gustavo Sousa (1): drm/i915: Move hotplug inversion logic into separate helper Imre Deak (6): drm/i915: Fix TypeC mode initialization during system resume drm/i915: Fix simulated GPU reset wrt. encoder HW readout drm/i915/tgl+: Add locking around DKL PHY register accesses drm/i915: Rename intel_tc_phy_regs.h to intel_mg_phy_regs.h drm/i915/tgl+: Move DKL PHY register definitions to intel_dkl_phy_regs.h drm/i915/tgl+: Sanitize DKL PHY register definitions Jani Nikula (4): drm/i915/hotplug: move hotplug storm debugfs to intel_hotplug.c drm/i915/hotplug: refactor hotplug init slightly drm/i915/display: remove ipc_enabled from struct drm_i915_private drm/i915: fix device info for devices without display José Roberto de Souza (3): drm/i915: Parse and set stepping for platforms with GMD drm/i915/mtl: Extend PSR support drm/i915: Extend Wa_1607297627 to Alderlake-P Jouni Högander (1): drm/i915/psr: Fix PSR_IMR/IIR field handling Matt Roper (1): drm/i915: Read graphics/media/display arch version from hw Niranjana Vishwanathapura (1): drm/i915: Remove unused function parameter Nirmoy Das (1): drm/i915: Print return value on error Radhakrishna Sripada (3): drm/i915/mtl: Add MTP ddc pin configuration drm/i915: Add intel_ prefix to struct ip_version drm/i915: Use graphics ver, rel info for media on old platforms Suraj Kandpal (1): drm/i915: Remove one use macro Ville Syrjälä (92): drm/i915: WARN if a port should use VBT provided vswing tables drm/i915/fbc: Move flip_pending assignmnt drm/i915/fbc: Use lockdep_assert_held() drm/i915: Nuke stale plane cdclk ratio FIXMEs drm/i915/fbc: Remove stale FIXME drm/i915: Drop pointless middle man variable drm/i915: Clean up transcoder_to_stream_enc_status() drm/i915: Drop pointless 'budget' variable drm/i915: Use BIT() when dealing with output types drm/i915: Pass intel_encoder to to_lvds_encoder() drm/i915: Extract intel_edp_backlight_setup() drm/i915: Extract intel_tv_add_properties() drm/i915: Extract intel_dp_mst_add_properties() drm/i915: Extract intel_lvds_add_properties() drm/i915: Move eDP scaling_mode prop setup to the proper place drm/i915: Extract intel_attach_scaling_mode_property() drm/i915: Clean up connector->*_allowed setup drm/i915: Don't init eDP if we can't find a fixed mode drm/i915: Split g4x_compute_pipe_wm() into two drm/i915: Split vlv_compute_pipe_wm() into two drm/i915: Simplify up g4x watermark sanitation drm/i915: Simplify up vlv watermark sanitation drm/i915: Add missing invalidate to g4x wm readout drm/i915: Force DPLL calculation for TC ports after readout drm/i915: Don't bail early from intel_dp_initial_fastset_check() drm/i915: Pimp DPLL ref/unref debugs drm/i915: WARN if PLL ref/unref got messed up drm/i915: Always initialize dpll.lock drm/i915: Nuke intel_get_shared_dpll_id() drm/i915: Round to closest in g4x+ HDMI clock readout drm/i915: Simplify intel_panel_add_edid_alt_fixed_modes() drm/i915: Allow alternate fixed modes always for eDP drm/i915: Allow alternate fixed modes always for LVDS drm/i915: Remove PLL asserts from .load_luts() drm/i915: Split up intel_color_init() drm/i915: Simplify the intel_color_init_hooks() if ladder drm/i915: Clean up intel_color_init_hooks() drm/i915: Change glk_load_degamma_lut() calling convention drm/i915: Add some debug prints for intel_modeset_all_pipes() drm/i915: Fix watermark calculations for gen12+ RC CCS modifier drm/i915: Fix watermark calculations for gen12+ MC CCS modifier drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier drm/i915: Fix watermark calculations for DG2 CCS modifiers drm/i915: Fix watermark calculations for DG2 CCS+CC modifier drm/i915: Simplify modifier lookup in watermark code drm/i915: Reject excessive dotclocks early drm/i915: Move DRRS debugfs next to the implementation drm/i915: Make the DRRS debugfs contents more consistent drm/i915: Make DRRS debugfs per-crtc/connector drm/i915: Fix locking in DRRS debugfs drm/i915: Tighten DRRS capability reporting drm/i915: Setup final panel drrs_type already during init drm/i915: Clean up some namespacing drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms drm/i915: Write watermarks for disabled pipes on gmch platforms drm/i915: Do the DRIVER_ATOMIC feature disable later drm/i915: Enable atomic by default on ctg/elk drm/i915: Allow panel fixed modes to have differing sync polarities drm/i915: Activate DRRS after state readout drm/i915: Introduce intel_crtc_needs_fastset() drm/i915: Remove some local 'mode_changed' bools drm/i915: Don't flag both full modeset and fastset at the same time drm/i915: Introduce intel_crtc_needs_color_update() drm/i915: Make ilk_load_luts() deal with degamma drm/i915: Introduce crtc_state->{pre,post}_csc_lut drm/i915: Assert {pre,post}_csc_lut were assigned sensibly drm/i915: Get rid of glk_load_degamma_lut_linear() drm/i915: Stop loading linear degamma LUT on glk needlessly drm/i915/audio: s/dev_priv/i915/ drm/i915/audio: Nuke leftover ROUNDING_FACTOR drm/i915/audio: Remove CL/BLC audio stuff drm/i915/audio: Extract struct ilk_audio_regs drm/i915/audio: Use REG_BIT() & co. drm/i915/audio: Unify register bit naming drm/i915/audio: Protect singleton register with a lock drm/i915/audio: Nuke intel_eld_uptodate() drm/i915/audio: Read ELD buffer size from hardware drm/i915/audio: Make sure we write the whole ELD buffer drm/i915/audio: Use u32* for ELD drm/i915/audio: Use intel_de_rmw() for most audio registers drm/i915/audio: Split "ELD valid" vs. audio PD on hsw+ drm/i915/audio: Do the vblank waits drm/i915/sdvo: Extract intel_sdvo_has_audio() drm/i915/sdvo: Filter out invalid outputs more sensibly drm/i915/sdvo: Setup DDC fully before output init drm/i915/sdvo: Grab mode_config.mutex during LVDS init to avoid WARNs drm/i915/sdvo: Simplify output setup debugs drm/i915/sdvo: Don't add DDC modes for LVDS drm/i915/sdvo: Get rid of the output type<->device index stuff drm/i915/sdvo: Reduce copy-pasta in output setup drm/i915/sdvo: Fix debug print drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/g4x_hdmi.c | 6 +- drivers/gpu/drm/i915/display/hsw_ips.c | 8 +- drivers/gpu/drm/i915/display/icl_dsi.c | 21 +- drivers/gpu/drm/i915/display/intel_atomic.c | 8 + drivers/gpu/drm/i915/display/intel_atomic_plane.c | 58 +- drivers/gpu/drm/i915/display/intel_audio.c | 656 ++++++++++----------- drivers/gpu/drm/i915/display/intel_audio_regs.h | 87 ++- drivers/gpu/drm/i915/display/intel_bios.c | 10 +- drivers/gpu/drm/i915/display/intel_cdclk.c | 89 +-- drivers/gpu/drm/i915/display/intel_color.c | 360 ++++++----- drivers/gpu/drm/i915/display/intel_color.h | 6 +- drivers/gpu/drm/i915/display/intel_combo_phy.c | 18 +- drivers/gpu/drm/i915/display/intel_connector.c | 18 + drivers/gpu/drm/i915/display/intel_connector.h | 1 + drivers/gpu/drm/i915/display/intel_crt.c | 9 +- drivers/gpu/drm/i915/display/intel_crtc.c | 8 +- .../gpu/drm/i915/display/intel_crtc_state_dump.c | 12 +- drivers/gpu/drm/i915/display/intel_cursor.c | 6 +- drivers/gpu/drm/i915/display/intel_ddi.c | 101 ++-- drivers/gpu/drm/i915/display/intel_display.c | 166 +++--- drivers/gpu/drm/i915/display/intel_display.h | 7 +- drivers/gpu/drm/i915/display/intel_display_core.h | 13 + .../gpu/drm/i915/display/intel_display_debugfs.c | 309 +--------- drivers/gpu/drm/i915/display/intel_display_power.c | 3 +- .../drm/i915/display/intel_display_power_well.c | 8 +- drivers/gpu/drm/i915/display/intel_display_types.h | 27 +- drivers/gpu/drm/i915/display/intel_dkl_phy.c | 106 ++++ drivers/gpu/drm/i915/display/intel_dkl_phy.h | 24 + drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h | 204 +++++++ drivers/gpu/drm/i915/display/intel_dmc.c | 22 +- drivers/gpu/drm/i915/display/intel_dp.c | 106 ++-- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 20 +- drivers/gpu/drm/i915/display/intel_dp_mst.c | 46 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 125 ++-- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 3 - drivers/gpu/drm/i915/display/intel_drrs.c | 112 +++- drivers/gpu/drm/i915/display/intel_drrs.h | 4 +- drivers/gpu/drm/i915/display/intel_dvo.c | 6 +- drivers/gpu/drm/i915/display/intel_fb.c | 13 + drivers/gpu/drm/i915/display/intel_fb.h | 1 + drivers/gpu/drm/i915/display/intel_fbc.c | 33 +- drivers/gpu/drm/i915/display/intel_fbdev.c | 6 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +- drivers/gpu/drm/i915/display/intel_hotplug.c | 216 ++++++- drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +- drivers/gpu/drm/i915/display/intel_lpe_audio.c | 5 +- drivers/gpu/drm/i915/display/intel_lvds.c | 48 +- .../{intel_tc_phy_regs.h => intel_mg_phy_regs.h} | 6 +- drivers/gpu/drm/i915/display/intel_modeset_setup.c | 22 +- .../gpu/drm/i915/display/intel_modeset_verify.c | 3 +- drivers/gpu/drm/i915/display/intel_opregion.c | 7 +- drivers/gpu/drm/i915/display/intel_panel.c | 34 +- drivers/gpu/drm/i915/display/intel_panel.h | 2 +- drivers/gpu/drm/i915/display/intel_pipe_crc.c | 9 +- drivers/gpu/drm/i915/display/intel_psr.c | 114 ++-- drivers/gpu/drm/i915/display/intel_sdvo.c | 198 ++++--- drivers/gpu/drm/i915/display/intel_tc.c | 78 ++- drivers/gpu/drm/i915/display/intel_tc.h | 3 +- drivers/gpu/drm/i915/display/intel_tv.c | 87 +-- drivers/gpu/drm/i915/display/skl_watermark.c | 12 +- drivers/gpu/drm/i915/display/vlv_dsi.c | 22 +- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 +- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 +- drivers/gpu/drm/i915/i915_driver.c | 26 +- drivers/gpu/drm/i915/i915_drv.h | 8 +- drivers/gpu/drm/i915/i915_irq.c | 270 ++++----- drivers/gpu/drm/i915/i915_pci.c | 13 +- drivers/gpu/drm/i915/i915_reg.h | 204 +------ drivers/gpu/drm/i915/i915_sw_fence.c | 1 - drivers/gpu/drm/i915/i915_sw_fence.h | 1 - drivers/gpu/drm/i915/intel_device_info.c | 86 ++- drivers/gpu/drm/i915/intel_device_info.h | 17 +- drivers/gpu/drm/i915/intel_pm.c | 266 ++++----- drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +- drivers/gpu/drm/i915/intel_step.c | 25 + drivers/gpu/drm/i915/intel_step.h | 28 +- drivers/gpu/drm/i915/intel_uncore.h | 8 +- drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 1 + drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 + drivers/gpu/drm/i915/vlv_suspend.c | 28 +- 82 files changed, 2600 insertions(+), 2126 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy.c create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy.h create mode 100644 drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h rename drivers/gpu/drm/i915/display/{intel_tc_phy_regs.h => intel_mg_phy_regs.h} (99%)