| Message ID | 20221102165719.190378-1-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] target/mips: Don't check COP1X for 64 bit FP mode | expand |
On 2/11/22 17:57, Jiaxun Yang wrote: > Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit > FPU without implmenting COP1X instructions. > > As the eligibility of 64 bit FP instructions is already determined by > CP0St_FR, there is no need to check for COP1X again. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > target/mips/tcg/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c > index 2f2d707a12..e49d2a25a8 100644 > --- a/target/mips/tcg/translate.c > +++ b/target/mips/tcg/translate.c > @@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx) > */ > void check_cp1_64bitmode(DisasContext *ctx) > { > - if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X))) { > + if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { > gen_reserved_instruction(ctx); > } > } Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 2/11/22 17:57, Jiaxun Yang wrote: > Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit > FPU without implmenting COP1X instructions. > > As the eligibility of 64 bit FP instructions is already determined by > CP0St_FR, there is no need to check for COP1X again. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > target/mips/tcg/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Queued to mips-fixes, thanks.
On 7/11/22 23:47, Philippe Mathieu-Daudé wrote: > On 2/11/22 17:57, Jiaxun Yang wrote: >> Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit >> FPU without implmenting COP1X instructions. >> >> As the eligibility of 64 bit FP instructions is already determined by >> CP0St_FR, there is no need to check for COP1X again. >> >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >> --- >> target/mips/tcg/translate.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c >> index 2f2d707a12..e49d2a25a8 100644 >> --- a/target/mips/tcg/translate.c >> +++ b/target/mips/tcg/translate.c >> @@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx) >> */ >> void check_cp1_64bitmode(DisasContext *ctx) >> { >> - if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X))) { >> + if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { >> gen_reserved_instruction(ctx); >> } >> } Did you test your patch? I'm getting: ../../target/mips/tcg/translate.c:1548:49: error: expected ')' if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { ^ ../../target/mips/tcg/translate.c:1548:8: note: to match this '(' if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { ^ ../../target/mips/tcg/translate.c:1551:1: error: expected statement } ^
在 2022/11/7 23:29, Philippe Mathieu-Daudé 写道: > On 7/11/22 23:47, Philippe Mathieu-Daudé wrote: >> On 2/11/22 17:57, Jiaxun Yang wrote: >>> Some implementations (i.e. Loongson-2F) may decide to implement a 64 >>> bit >>> FPU without implmenting COP1X instructions. >>> >>> As the eligibility of 64 bit FP instructions is already determined by >>> CP0St_FR, there is no need to check for COP1X again. >>> >>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >>> --- >>> target/mips/tcg/translate.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c >>> index 2f2d707a12..e49d2a25a8 100644 >>> --- a/target/mips/tcg/translate.c >>> +++ b/target/mips/tcg/translate.c >>> @@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx) >>> */ >>> void check_cp1_64bitmode(DisasContext *ctx) >>> { >>> - if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | >>> MIPS_HFLAG_COP1X))) { >>> + if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { >>> gen_reserved_instruction(ctx); >>> } >>> } > > Did you test your patch? I'm getting: > > ../../target/mips/tcg/translate.c:1548:49: error: expected ')' > if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { > ^ > ../../target/mips/tcg/translate.c:1548:8: note: to match this '(' > if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { > ^ > ../../target/mips/tcg/translate.c:1551:1: error: expected statement > } Woah, typo when copy changes back from test machine... Will use git publish next time. Thanks - Jiaxun > ^ >
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 2f2d707a12..e49d2a25a8 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -1545,7 +1545,7 @@ void check_cop1x(DisasContext *ctx) */ void check_cp1_64bitmode(DisasContext *ctx) { - if (unlikely(~ctx->hflags & (MIPS_HFLAG_F64 | MIPS_HFLAG_COP1X))) { + if (unlikely(~ctx->hflags & MIPS_HFLAG_F64) { gen_reserved_instruction(ctx); } }
Some implementations (i.e. Loongson-2F) may decide to implement a 64 bit FPU without implmenting COP1X instructions. As the eligibility of 64 bit FP instructions is already determined by CP0St_FR, there is no need to check for COP1X again. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- target/mips/tcg/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)