| Message ID | 20221110053724.14701-1-anusha.srivatsa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display: Add missing checks for cdclk crawling | expand |
On Wed, 09 Nov 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote: > cdclk_sanitize() function was written assuming vco was a signed integer. > vco gets assigned to -1 (essentially ~0) for the case where PLL > might be enabled and vco is not a frequency that will ever > get used. In such a scenario the right thing to do is disable the > PLL and re-enable it again with a valid frequency. > However the vco is declared as a unsigned variable. > With the above assumption, driver takes crawl path when not needed. > Add explicit check to not crawl in the case of an invalid PLL. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 ++ > drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 8a9031012d74..91112d266763 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1962,6 +1962,8 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv, > if (!HAS_CDCLK_CRAWL(dev_priv)) > return false; > > + if (intel_pll_is_unknown(a->vco)) > + return false; > /* > * The vco and cd2x divider will change independently > * from each, so we disallow cd2x change when crawling. > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h > index c674879a84a5..6eb83d806f11 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h > @@ -80,6 +80,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state); > to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > #define intel_atomic_get_new_cdclk_state(state) \ > to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > +#define intel_pll_is_unknown(vco) ((vco) == ~0) Why here? What does a pll function do in intel_cdclk.h? BR, Jani. > > int intel_cdclk_init(struct drm_i915_private *dev_priv);
On Thu, Nov 10, 2022 at 01:28:19PM +0200, Jani Nikula wrote: > On Wed, 09 Nov 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote: > > cdclk_sanitize() function was written assuming vco was a signed integer. > > vco gets assigned to -1 (essentially ~0) for the case where PLL > > might be enabled and vco is not a frequency that will ever > > get used. In such a scenario the right thing to do is disable the > > PLL and re-enable it again with a valid frequency. > > However the vco is declared as a unsigned variable. > > With the above assumption, driver takes crawl path when not needed. > > Add explicit check to not crawl in the case of an invalid PLL. > > > > Cc: Matt Roper <matthew.d.roper@intel.com> > > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 ++ > > drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + > > 2 files changed, 3 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > > index 8a9031012d74..91112d266763 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > > @@ -1962,6 +1962,8 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv, > > if (!HAS_CDCLK_CRAWL(dev_priv)) > > return false; > > > > + if (intel_pll_is_unknown(a->vco)) > > + return false; > > /* > > * The vco and cd2x divider will change independently > > * from each, so we disallow cd2x change when crawling. > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h > > index c674879a84a5..6eb83d806f11 100644 > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h > > @@ -80,6 +80,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state); > > to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > > #define intel_atomic_get_new_cdclk_state(state) \ > > to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > > +#define intel_pll_is_unknown(vco) ((vco) == ~0) > > Why here? What does a pll function do in intel_cdclk.h? Since this is referring to the cdclk pll (not port pll's), I suspect this shouldn't be needed anywhere outside the cdclk code. So it might be best just make this a static function inside the cdclk .c file rather than placing it in a header that exposes it to the rest of the driver. I.e., something like: static bool pll_us_unknown(struct intel_cdclk_state *s) { return (s->vco == ~0); } Matt > > BR, > Jani. > > > > > int intel_cdclk_init(struct drm_i915_private *dev_priv); > > -- > Jani Nikula, Intel Open Source Graphics Center
On Wed, Nov 09, 2022 at 09:37:24PM -0800, Anusha Srivatsa wrote: > cdclk_sanitize() function was written assuming vco was a signed integer. > vco gets assigned to -1 (essentially ~0) for the case where PLL > might be enabled and vco is not a frequency that will ever > get used. In such a scenario the right thing to do is disable the > PLL and re-enable it again with a valid frequency. > However the vco is declared as a unsigned variable. > With the above assumption, driver takes crawl path when not needed. > Add explicit check to not crawl in the case of an invalid PLL. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 2 ++ > drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 8a9031012d74..91112d266763 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1962,6 +1962,8 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv, > if (!HAS_CDCLK_CRAWL(dev_priv)) > return false; > > + if (intel_pll_is_unknown(a->vco)) > + return false; I think this guy is only called from the atomic_check() path, so this check shouldn't be needed here. Where we do need it is the crawl check bxt_set_cdclk() since that is what gets called directly from the sanitize() path with hw.vco=~0. > /* > * The vco and cd2x divider will change independently > * from each, so we disallow cd2x change when crawling. > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h > index c674879a84a5..6eb83d806f11 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h > @@ -80,6 +80,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state); > to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > #define intel_atomic_get_new_cdclk_state(state) \ > to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) > +#define intel_pll_is_unknown(vco) ((vco) == ~0) > > int intel_cdclk_init(struct drm_i915_private *dev_priv); > > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 8a9031012d74..91112d266763 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1962,6 +1962,8 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv, if (!HAS_CDCLK_CRAWL(dev_priv)) return false; + if (intel_pll_is_unknown(a->vco)) + return false; /* * The vco and cd2x divider will change independently * from each, so we disallow cd2x change when crawling. diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h index c674879a84a5..6eb83d806f11 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.h +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h @@ -80,6 +80,7 @@ intel_atomic_get_cdclk_state(struct intel_atomic_state *state); to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) #define intel_atomic_get_new_cdclk_state(state) \ to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->display.cdclk.obj)) +#define intel_pll_is_unknown(vco) ((vco) == ~0) int intel_cdclk_init(struct drm_i915_private *dev_priv);
cdclk_sanitize() function was written assuming vco was a signed integer. vco gets assigned to -1 (essentially ~0) for the case where PLL might be enabled and vco is not a frequency that will ever get used. In such a scenario the right thing to do is disable the PLL and re-enable it again with a valid frequency. However the vco is declared as a unsigned variable. With the above assumption, driver takes crawl path when not needed. Add explicit check to not crawl in the case of an invalid PLL. Cc: Matt Roper <matthew.d.roper@intel.com> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/display/intel_cdclk.c | 2 ++ drivers/gpu/drm/i915/display/intel_cdclk.h | 1 + 2 files changed, 3 insertions(+)