| Message ID | 20221103044125.172864-6-mranostay@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | J721S2: Add support for additional IPs | expand |
On 03/11/22 10:11 am, Matt Ranostay wrote: > From: Aswath Govindraju <a-govindraju@ti.com> > > The board uses lane 1 of SERDES for USB. Set the mux > accordingly. > > The USB controller and EVM supports super-speed for USB0 > on the Type-C port. However, the SERDES has a limitation > that upto 2 protocols can be used at a time. The SERDES is > wired for PCIe, eDP and USB super-speed. It has been > chosen to use PCIe and eDP as default. So restrict > USB0 to high-speed mode. > > Cc: Vignesh Raghavendra <vigneshr@ti.com> > Cc: Nishanth Menon <nm@ti.com> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > Signed-off-by: Matt Ranostay <mranostay@ti.com> > --- > .../dts/ti/k3-j721s2-common-proc-board.dts | 22 +++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts > index c3a397484c70..c787d46f89de 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts > @@ -147,6 +147,12 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { > J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ > >; > }; > + > + main_usbss0_pins_default: main-usbss0-pins-default { > + pinctrl-single,pins = < > + J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ > + >; > + }; > }; > > &wkup_pmx0 { > @@ -318,6 +324,22 @@ serdes0_pcie_link: phy@0 { > }; > }; > > +&usb_serdes_mux { > + idle-states = <1>; /* USB0 to SERDES lane 1 */ > +}; > + > +&usbss0 { > + pinctrl-0 = <&main_usbss0_pins_default>; > + pinctrl-names = "default"; > + ti,vbus-divider; > + ti,usb2-only; > +}; > + > +&usb0 { > + dr_mode = "otg"; > + maximum-speed = "high-speed"; > +}; > + > &mcu_mcan0 { > status = "okay"; > pinctrl-names = "default"; Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index c3a397484c70..c787d46f89de 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -147,6 +147,12 @@ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ >; }; + + main_usbss0_pins_default: main-usbss0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ + >; + }; }; &wkup_pmx0 { @@ -318,6 +324,22 @@ serdes0_pcie_link: phy@0 { }; }; +&usb_serdes_mux { + idle-states = <1>; /* USB0 to SERDES lane 1 */ +}; + +&usbss0 { + pinctrl-0 = <&main_usbss0_pins_default>; + pinctrl-names = "default"; + ti,vbus-divider; + ti,usb2-only; +}; + +&usb0 { + dr_mode = "otg"; + maximum-speed = "high-speed"; +}; + &mcu_mcan0 { status = "okay"; pinctrl-names = "default";