diff mbox series

drm/i915/display: Add missing CDCLK Squash support for MTL

Message ID 20221118190008.824412-1-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display: Add missing CDCLK Squash support for MTL | expand

Commit Message

Srivatsa, Anusha Nov. 18, 2022, 7 p.m. UTC
MTL supports both squash and crawl.

Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Lucas De Marchi Nov. 18, 2022, 7:42 p.m. UTC | #1
On Fri, Nov 18, 2022 at 11:00:08AM -0800, Anusha Srivatsa wrote:
>MTL supports both squash and crawl.
>
>Cc: Clint Taylor <clinton.a.taylor@intel.com>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>---
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>index cf3b28d71d2b..d82f118809e9 100644
>--- a/drivers/gpu/drm/i915/i915_pci.c
>+++ b/drivers/gpu/drm/i915/i915_pci.c
>@@ -1118,6 +1118,7 @@ static const struct intel_device_info pvc_info = {
> 	XE_LPD_FEATURES,	\
> 	.__runtime.display.ip.ver = 14,	\
> 	.display.has_cdclk_crawl = 1, \
>+	.display.has_cdclk_squash = 1, \

warning about inconsistent cdclk is now gone,


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>


thanks,
Lucas De Marchi

> 	.__runtime.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B)
>
> static const struct intel_gt_definition xelpmp_extra_gt[] = {
>-- 
>2.25.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index cf3b28d71d2b..d82f118809e9 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1118,6 +1118,7 @@  static const struct intel_device_info pvc_info = {
 	XE_LPD_FEATURES,	\
 	.__runtime.display.ip.ver = 14,	\
 	.display.has_cdclk_crawl = 1, \
+	.display.has_cdclk_squash = 1, \
 	.__runtime.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B)
 
 static const struct intel_gt_definition xelpmp_extra_gt[] = {