Message ID | 20221126061557.3541-1-samuel@sholland.org (mailing list archive) |
---|---|
State | Accepted |
Commit | 1d6b5ed41f8c5c7012dbebe9bc0e2292a5a232b4 |
Delegated to: | Palmer Dabbelt |
Headers | show |
Series | riscv: Fix NR_CPUS range conditions | expand |
Context | Check | Description |
---|---|---|
conchuod/patch_count | success | Link |
conchuod/cover_letter | success | Single patches do not need cover letters |
conchuod/tree_selection | success | Guessed tree name to be fixes |
conchuod/fixes_present | success | Fixes tag present in non-next series |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/build_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 0 this patch: 0 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 12 lines checked |
conchuod/source_inline | success | Was 0 now: 0 |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | Fixes tag looks correct |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Sat, Nov 26, 2022 at 12:15:56AM -0600, Samuel Holland wrote: > The conditions reference the symbol SBI_V01, which does not exist. The > correct symbol is RISCV_SBI_V01. Huh, good spot. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > arch/riscv/Kconfig | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index fec54872ab45..acbfe34c6a00 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -319,9 +319,9 @@ config SMP > config NR_CPUS > int "Maximum number of CPUs (2-512)" > depends on SMP > - range 2 512 if !SBI_V01 > - range 2 32 if SBI_V01 && 32BIT > - range 2 64 if SBI_V01 && 64BIT > + range 2 512 if !RISCV_SBI_V01 > + range 2 32 if RISCV_SBI_V01 && 32BIT > + range 2 64 if RISCV_SBI_V01 && 64BIT > default "32" if 32BIT > default "64" if 64BIT > > -- > 2.37.4 >
On Sat, Nov 26, 2022 at 03:32:04PM +0000, Conor Dooley wrote: > On Sat, Nov 26, 2022 at 12:15:56AM -0600, Samuel Holland wrote: > > The conditions reference the symbol SBI_V01, which does not exist. The > > correct symbol is RISCV_SBI_V01. > > Huh, good spot. > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Yeah, huh. It never occurred to me that we don't have some sort of symbol referencing checking in kconfig. Or maybe we do and I just don't know how to enable it? Anyway, this issue made me wonder how many more dangling references we may have. I wrote a script to look for them and found 29, including this one. I'm not exactly sure how to report them since they touch so many different places. For now, I've opened this kernel BZ https://bugzilla.kernel.org/show_bug.cgi?id=216748 > > > > > Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") > > Signed-off-by: Samuel Holland <samuel@sholland.org> > > --- > > > > arch/riscv/Kconfig | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index fec54872ab45..acbfe34c6a00 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -319,9 +319,9 @@ config SMP > > config NR_CPUS > > int "Maximum number of CPUs (2-512)" > > depends on SMP > > - range 2 512 if !SBI_V01 > > - range 2 32 if SBI_V01 && 32BIT > > - range 2 64 if SBI_V01 && 64BIT > > + range 2 512 if !RISCV_SBI_V01 > > + range 2 32 if RISCV_SBI_V01 && 32BIT > > + range 2 64 if RISCV_SBI_V01 && 64BIT And for this patch, Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
On Mon, Nov 28, 2022 at 07:35:59PM +0100, Andrew Jones wrote: > On Sat, Nov 26, 2022 at 03:32:04PM +0000, Conor Dooley wrote: > > On Sat, Nov 26, 2022 at 12:15:56AM -0600, Samuel Holland wrote: > > > The conditions reference the symbol SBI_V01, which does not exist. The > > > correct symbol is RISCV_SBI_V01. > > > > Huh, good spot. > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Yeah, huh. It never occurred to me that we don't have some sort of symbol > referencing checking in kconfig. Or maybe we do and I just don't know how kismet, but that does the opposite. Randy Dunlap is the only person I see fiddling with that stuff usually, so perhaps he knows? +CC them either way. > to enable it? Anyway, this issue made me wonder how many more dangling > references we may have. I wrote a script to look for them and found 29, > including this one. I'm not exactly sure how to report them since they > touch so many different places. For now, I've opened this kernel BZ > > https://bugzilla.kernel.org/show_bug.cgi?id=216748 > > > > > > > > > Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") > > > Signed-off-by: Samuel Holland <samuel@sholland.org> > > > --- > > > > > > arch/riscv/Kconfig | 6 +++--- > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > > index fec54872ab45..acbfe34c6a00 100644 > > > --- a/arch/riscv/Kconfig > > > +++ b/arch/riscv/Kconfig > > > @@ -319,9 +319,9 @@ config SMP > > > config NR_CPUS > > > int "Maximum number of CPUs (2-512)" > > > depends on SMP > > > - range 2 512 if !SBI_V01 > > > - range 2 32 if SBI_V01 && 32BIT > > > - range 2 64 if SBI_V01 && 64BIT > > > + range 2 512 if !RISCV_SBI_V01 > > > + range 2 32 if RISCV_SBI_V01 && 32BIT > > > + range 2 64 if RISCV_SBI_V01 && 64BIT > > And for this patch, > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > Thanks, > drew
On Sat, 26 Nov 2022 00:15:56 -0600, Samuel Holland wrote: > The conditions reference the symbol SBI_V01, which does not exist. The > correct symbol is RISCV_SBI_V01. > > Applied, thanks! [1/1] riscv: Fix NR_CPUS range conditions https://git.kernel.org/palmer/c/1d6b5ed41f8c Best regards,
On Mon, 28 Nov 2022 10:35:59 PST (-0800), ajones@ventanamicro.com wrote: > On Sat, Nov 26, 2022 at 03:32:04PM +0000, Conor Dooley wrote: >> On Sat, Nov 26, 2022 at 12:15:56AM -0600, Samuel Holland wrote: >> > The conditions reference the symbol SBI_V01, which does not exist. The >> > correct symbol is RISCV_SBI_V01. >> >> Huh, good spot. >> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Yeah, huh. It never occurred to me that we don't have some sort of symbol > referencing checking in kconfig. Or maybe we do and I just don't know how > to enable it? Anyway, this issue made me wonder how many more dangling > references we may have. I wrote a script to look for them and found 29, > including this one. I'm not exactly sure how to report them since they > touch so many different places. For now, I've opened this kernel BZ > > https://bugzilla.kernel.org/show_bug.cgi?id=216748 Thanks. This is on fixes, it's sort of jumping the queue (I've got a bunch of stuff still staged from last week, but thanksgiving screwed up the flow) but it's small enough it doesn't seem worth waiting. > >> >> > >> > Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") >> > Signed-off-by: Samuel Holland <samuel@sholland.org> >> > --- >> > >> > arch/riscv/Kconfig | 6 +++--- >> > 1 file changed, 3 insertions(+), 3 deletions(-) >> > >> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig >> > index fec54872ab45..acbfe34c6a00 100644 >> > --- a/arch/riscv/Kconfig >> > +++ b/arch/riscv/Kconfig >> > @@ -319,9 +319,9 @@ config SMP >> > config NR_CPUS >> > int "Maximum number of CPUs (2-512)" >> > depends on SMP >> > - range 2 512 if !SBI_V01 >> > - range 2 32 if SBI_V01 && 32BIT >> > - range 2 64 if SBI_V01 && 64BIT >> > + range 2 512 if !RISCV_SBI_V01 >> > + range 2 32 if RISCV_SBI_V01 && 32BIT >> > + range 2 64 if RISCV_SBI_V01 && 64BIT > > And for this patch, > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > Thanks, > drew
Hello: This patch was applied to riscv/linux.git (fixes) by Palmer Dabbelt <palmer@rivosinc.com>: On Sat, 26 Nov 2022 00:15:56 -0600 you wrote: > The conditions reference the symbol SBI_V01, which does not exist. The > correct symbol is RISCV_SBI_V01. > > Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > [...] Here is the summary with links: - riscv: Fix NR_CPUS range conditions https://git.kernel.org/riscv/c/1d6b5ed41f8c You are awesome, thank you!
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fec54872ab45..acbfe34c6a00 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -319,9 +319,9 @@ config SMP config NR_CPUS int "Maximum number of CPUs (2-512)" depends on SMP - range 2 512 if !SBI_V01 - range 2 32 if SBI_V01 && 32BIT - range 2 64 if SBI_V01 && 64BIT + range 2 512 if !RISCV_SBI_V01 + range 2 32 if RISCV_SBI_V01 && 32BIT + range 2 64 if RISCV_SBI_V01 && 64BIT default "32" if 32BIT default "64" if 64BIT
The conditions reference the symbol SBI_V01, which does not exist. The correct symbol is RISCV_SBI_V01. Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS") Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/riscv/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)