diff mbox series

[bpf-next] libbpf: Add LoongArch support to bpf_tracing.h

Message ID 20221212091136.969960-1-hengqi.chen@gmail.com (mailing list archive)
State Superseded
Delegated to: BPF
Headers show
Series [bpf-next] libbpf: Add LoongArch support to bpf_tracing.h | expand

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Commit Message

Hengqi Chen Dec. 12, 2022, 9:11 a.m. UTC
Add PT_REGS macros for LoongArch64.

Signed-off-by: Hengqi Chen <hengqi.chen@gmail.com>
---
 tools/lib/bpf/bpf_tracing.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

--
2.31.1

Comments

Andrii Nakryiko Dec. 13, 2022, 12:17 a.m. UTC | #1
On Mon, Dec 12, 2022 at 1:11 AM Hengqi Chen <hengqi.chen@gmail.com> wrote:
>
> Add PT_REGS macros for LoongArch64.
>
> Signed-off-by: Hengqi Chen <hengqi.chen@gmail.com>
> ---
>  tools/lib/bpf/bpf_tracing.h | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>
> diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h
> index 2972dc25ff72..2d7da1caa961 100644
> --- a/tools/lib/bpf/bpf_tracing.h
> +++ b/tools/lib/bpf/bpf_tracing.h
> @@ -32,6 +32,9 @@
>  #elif defined(__TARGET_ARCH_arc)
>         #define bpf_target_arc
>         #define bpf_target_defined
> +#elif defined(__TARGET_ARCH_loongarch)
> +       #define bpf_target_loongarch
> +       #define bpf_target_defined
>  #else
>
>  /* Fall back to what the compiler says */
> @@ -62,6 +65,9 @@
>  #elif defined(__arc__)
>         #define bpf_target_arc
>         #define bpf_target_defined
> +#elif defined(__loongarch__) && __loongarch_grlen == 64
> +       #define bpf_target_loongarch
> +       #define bpf_target_defined
>  #endif /* no compiler target */
>
>  #endif
> @@ -258,6 +264,21 @@ struct pt_regs___arm64 {
>  /* arc does not select ARCH_HAS_SYSCALL_WRAPPER. */
>  #define PT_REGS_SYSCALL_REGS(ctx) ctx
>
> +#elif defined(bpf_target_loongarch)
> +
> +#define __PT_PARM1_REG regs[5]
> +#define __PT_PARM2_REG regs[6]
> +#define __PT_PARM3_REG regs[7]
> +#define __PT_PARM4_REG regs[8]
> +#define __PT_PARM5_REG regs[9]
> +#define __PT_RET_REG regs[1]
> +#define __PT_FP_REG regs[22]
> +#define __PT_RC_REG regs[4]
> +#define __PT_SP_REG regs[3]
> +#define __PT_IP_REG csr_era
> +/* loongarch does not select ARCH_HAS_SYSCALL_WRAPPER. */
> +#define PT_REGS_SYSCALL_REGS(ctx) ctx

Is there some online documentation explaining this architecture's
calling conventions? It would be useful to include that as a comment
to be able to refer back to it. On a related note, are there any
syscall specific calling convention differences, similar to
PT_REGS_PARM1_SYSCALL for arm64 or PT_REGS_PARM4_SYSCALL for x86-64?

> +
>  #endif
>
>  #if defined(bpf_target_defined)
> --
> 2.31.1
Andrii Nakryiko Dec. 13, 2022, 10:09 p.m. UTC | #2
On Mon, Dec 12, 2022 at 4:17 PM Andrii Nakryiko
<andrii.nakryiko@gmail.com> wrote:
>
> On Mon, Dec 12, 2022 at 1:11 AM Hengqi Chen <hengqi.chen@gmail.com> wrote:
> >
> > Add PT_REGS macros for LoongArch64.
> >
> > Signed-off-by: Hengqi Chen <hengqi.chen@gmail.com>
> > ---
> >  tools/lib/bpf/bpf_tracing.h | 21 +++++++++++++++++++++
> >  1 file changed, 21 insertions(+)
> >
> > diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h
> > index 2972dc25ff72..2d7da1caa961 100644
> > --- a/tools/lib/bpf/bpf_tracing.h
> > +++ b/tools/lib/bpf/bpf_tracing.h
> > @@ -32,6 +32,9 @@
> >  #elif defined(__TARGET_ARCH_arc)
> >         #define bpf_target_arc
> >         #define bpf_target_defined
> > +#elif defined(__TARGET_ARCH_loongarch)
> > +       #define bpf_target_loongarch
> > +       #define bpf_target_defined
> >  #else
> >
> >  /* Fall back to what the compiler says */
> > @@ -62,6 +65,9 @@
> >  #elif defined(__arc__)
> >         #define bpf_target_arc
> >         #define bpf_target_defined
> > +#elif defined(__loongarch__) && __loongarch_grlen == 64
> > +       #define bpf_target_loongarch
> > +       #define bpf_target_defined
> >  #endif /* no compiler target */
> >
> >  #endif
> > @@ -258,6 +264,21 @@ struct pt_regs___arm64 {
> >  /* arc does not select ARCH_HAS_SYSCALL_WRAPPER. */
> >  #define PT_REGS_SYSCALL_REGS(ctx) ctx
> >
> > +#elif defined(bpf_target_loongarch)
> > +
> > +#define __PT_PARM1_REG regs[5]
> > +#define __PT_PARM2_REG regs[6]
> > +#define __PT_PARM3_REG regs[7]
> > +#define __PT_PARM4_REG regs[8]
> > +#define __PT_PARM5_REG regs[9]
> > +#define __PT_RET_REG regs[1]
> > +#define __PT_FP_REG regs[22]
> > +#define __PT_RC_REG regs[4]
> > +#define __PT_SP_REG regs[3]
> > +#define __PT_IP_REG csr_era
> > +/* loongarch does not select ARCH_HAS_SYSCALL_WRAPPER. */
> > +#define PT_REGS_SYSCALL_REGS(ctx) ctx
>
> Is there some online documentation explaining this architecture's
> calling conventions? It would be useful to include that as a comment
> to be able to refer back to it. On a related note, are there any
> syscall specific calling convention differences, similar to
> PT_REGS_PARM1_SYSCALL for arm64 or PT_REGS_PARM4_SYSCALL for x86-64?
>

Ok, I think [0] would be a good resource, please add a link to it in
the comment. But also it seems like PARM1-5 should map to regs[6]
through regs[10] (not regs[5] - regs[9] that you have here). And BTW,
seems like architecture supports passing more than five, PARM6 would
be regs[11]. I've been wanting to add 6th+ argument to libbpf macros'
for a while (it came up in x86-64 world for uprobes as well), so if
you have cycles, please consider helping with that as well.

Also I see orig_a0 in struct pt_regs, which seems suspiciously similar
to arm64's PT_REGS_PARM1_SYSCALL's use of orig_x0, please check about
that as well. As I said, syscalls usually have some additional quirks.


  [0] https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html


> > +
> >  #endif
> >
> >  #if defined(bpf_target_defined)
> > --
> > 2.31.1
Hengqi Chen Dec. 14, 2022, 2:07 a.m. UTC | #3
On 2022/12/14 06:09, Andrii Nakryiko wrote:
> On Mon, Dec 12, 2022 at 4:17 PM Andrii Nakryiko
> <andrii.nakryiko@gmail.com> wrote:
>>
>> On Mon, Dec 12, 2022 at 1:11 AM Hengqi Chen <hengqi.chen@gmail.com> wrote:
>>>
>>> Add PT_REGS macros for LoongArch64.
>>>
>>> Signed-off-by: Hengqi Chen <hengqi.chen@gmail.com>
>>> ---
>>>  tools/lib/bpf/bpf_tracing.h | 21 +++++++++++++++++++++
>>>  1 file changed, 21 insertions(+)
>>>
>>> diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h
>>> index 2972dc25ff72..2d7da1caa961 100644
>>> --- a/tools/lib/bpf/bpf_tracing.h
>>> +++ b/tools/lib/bpf/bpf_tracing.h
>>> @@ -32,6 +32,9 @@
>>>  #elif defined(__TARGET_ARCH_arc)
>>>         #define bpf_target_arc
>>>         #define bpf_target_defined
>>> +#elif defined(__TARGET_ARCH_loongarch)
>>> +       #define bpf_target_loongarch
>>> +       #define bpf_target_defined
>>>  #else
>>>
>>>  /* Fall back to what the compiler says */
>>> @@ -62,6 +65,9 @@
>>>  #elif defined(__arc__)
>>>         #define bpf_target_arc
>>>         #define bpf_target_defined
>>> +#elif defined(__loongarch__) && __loongarch_grlen == 64
>>> +       #define bpf_target_loongarch
>>> +       #define bpf_target_defined
>>>  #endif /* no compiler target */
>>>
>>>  #endif
>>> @@ -258,6 +264,21 @@ struct pt_regs___arm64 {
>>>  /* arc does not select ARCH_HAS_SYSCALL_WRAPPER. */
>>>  #define PT_REGS_SYSCALL_REGS(ctx) ctx
>>>
>>> +#elif defined(bpf_target_loongarch)
>>> +
>>> +#define __PT_PARM1_REG regs[5]
>>> +#define __PT_PARM2_REG regs[6]
>>> +#define __PT_PARM3_REG regs[7]
>>> +#define __PT_PARM4_REG regs[8]
>>> +#define __PT_PARM5_REG regs[9]
>>> +#define __PT_RET_REG regs[1]
>>> +#define __PT_FP_REG regs[22]
>>> +#define __PT_RC_REG regs[4]
>>> +#define __PT_SP_REG regs[3]
>>> +#define __PT_IP_REG csr_era
>>> +/* loongarch does not select ARCH_HAS_SYSCALL_WRAPPER. */
>>> +#define PT_REGS_SYSCALL_REGS(ctx) ctx
>>
>> Is there some online documentation explaining this architecture's
>> calling conventions? It would be useful to include that as a comment
>> to be able to refer back to it. On a related note, are there any
>> syscall specific calling convention differences, similar to
>> PT_REGS_PARM1_SYSCALL for arm64 or PT_REGS_PARM4_SYSCALL for x86-64?
>>
> 
> Ok, I think [0] would be a good resource, please add a link to it in
> the comment. But also it seems like PARM1-5 should map to regs[6]
> through regs[10] (not regs[5] - regs[9] that you have here). And BTW,
> seems like architecture supports passing more than five, PARM6 would
> be regs[11]. I've been wanting to add 6th+ argument to libbpf macros'
> for a while (it came up in x86-64 world for uprobes as well), so if
> you have cycles, please consider helping with that as well.
> 

I've seen this on GitHub. Let me have a try.

> Also I see orig_a0 in struct pt_regs, which seems suspiciously similar
> to arm64's PT_REGS_PARM1_SYSCALL's use of orig_x0, please check about
> that as well. As I said, syscalls usually have some additional quirks.
> 
> 
>   [0] https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html
> 
> 
>>> +
>>>  #endif
>>>
>>>  #if defined(bpf_target_defined)
>>> --
>>> 2.31.1

Thanks, Andrii.

After some investigation, I do find some quirks on syscalls. Will update this patch.
diff mbox series

Patch

diff --git a/tools/lib/bpf/bpf_tracing.h b/tools/lib/bpf/bpf_tracing.h
index 2972dc25ff72..2d7da1caa961 100644
--- a/tools/lib/bpf/bpf_tracing.h
+++ b/tools/lib/bpf/bpf_tracing.h
@@ -32,6 +32,9 @@ 
 #elif defined(__TARGET_ARCH_arc)
 	#define bpf_target_arc
 	#define bpf_target_defined
+#elif defined(__TARGET_ARCH_loongarch)
+	#define bpf_target_loongarch
+	#define bpf_target_defined
 #else

 /* Fall back to what the compiler says */
@@ -62,6 +65,9 @@ 
 #elif defined(__arc__)
 	#define bpf_target_arc
 	#define bpf_target_defined
+#elif defined(__loongarch__) && __loongarch_grlen == 64
+	#define bpf_target_loongarch
+	#define bpf_target_defined
 #endif /* no compiler target */

 #endif
@@ -258,6 +264,21 @@  struct pt_regs___arm64 {
 /* arc does not select ARCH_HAS_SYSCALL_WRAPPER. */
 #define PT_REGS_SYSCALL_REGS(ctx) ctx

+#elif defined(bpf_target_loongarch)
+
+#define __PT_PARM1_REG regs[5]
+#define __PT_PARM2_REG regs[6]
+#define __PT_PARM3_REG regs[7]
+#define __PT_PARM4_REG regs[8]
+#define __PT_PARM5_REG regs[9]
+#define __PT_RET_REG regs[1]
+#define __PT_FP_REG regs[22]
+#define __PT_RC_REG regs[4]
+#define __PT_SP_REG regs[3]
+#define __PT_IP_REG csr_era
+/* loongarch does not select ARCH_HAS_SYSCALL_WRAPPER. */
+#define PT_REGS_SYSCALL_REGS(ctx) ctx
+
 #endif

 #if defined(bpf_target_defined)