| Message ID | 20221221034407.19605-7-allen-kh.cheng@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add ADSP power domains controller support for MT8192 | expand |
Il 21/12/22 04:44, Allen-KH Cheng ha scritto: > Add the missing ADSP power domains controller for mt8192-scp_adsp clock > controllers. > > Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers") > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 6b20376191a7..6ee60db3ac23 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -511,6 +511,14 @@ }; }; }; + + power-domain@MT8192_POWER_DOMAIN_ADSP { + reg = <MT8192_POWER_DOMAIN_ADSP>; + clocks = <&topckgen CLK_TOP_ADSP_SEL>; + clock-names = "adsp"; + mediatek,infracfg = <&infracfg>; + #power-domain-cells = <0>; + }; }; }; @@ -574,6 +582,7 @@ scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8192-scp_adsp"; reg = <0 0x10720000 0 0x1000>; + power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>; #clock-cells = <1>; };
Add the missing ADSP power domains controller for mt8192-scp_adsp clock controllers. Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers") Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)