| Message ID | 20221129015748.2066603-1-yangyingliang@huawei.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | [net,v2] ixgbe: fix pci device refcount leak | expand |
> -----Original Message----- > From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of > Yang Yingliang > Sent: Tuesday, November 29, 2022 7:28 AM > To: netdev@vger.kernel.org; intel-wired-lan@lists.osuosl.org > Cc: andrew@lunn.ch; f.fainelli@gmail.com; stephend@silicom-usa.com; > edumazet@google.com; jeffrey.t.kirsher@intel.com; kuba@kernel.org; > pabeni@redhat.com; davem@davemloft.net > Subject: [Intel-wired-lan] [PATCH net v2] ixgbe: fix pci device refcount leak > > As the comment of pci_get_domain_bus_and_slot() says, it returns a PCI > device with refcount incremented, when finish using it, the caller must > decrement the reference count by calling pci_dev_put(). > > In ixgbe_get_first_secondary_devfn() and ixgbe_x550em_a_has_mii(), > pci_dev_put() is called to avoid leak. > > Fixes: 8fa10ef01260 ("ixgbe: register a mdiobus") > Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> > --- > v1 -> v2: > Introduce a local variable, and put pci_dev_put() after value checks. > --- > drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 14 +++++++++----- > 1 file changed, 9 insertions(+), 5 deletions(-) > Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c index 24aa97f993ca..123dca9ce468 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c @@ -855,9 +855,11 @@ static struct pci_dev *ixgbe_get_first_secondary_devfn(unsigned int devfn) rp_pdev = pci_get_domain_bus_and_slot(0, 0, devfn); if (rp_pdev && rp_pdev->subordinate) { bus = rp_pdev->subordinate->number; + pci_dev_put(rp_pdev); return pci_get_domain_bus_and_slot(0, bus, 0); } + pci_dev_put(rp_pdev); return NULL; } @@ -874,6 +876,7 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw) struct ixgbe_adapter *adapter = hw->back; struct pci_dev *pdev = adapter->pdev; struct pci_dev *func0_pdev; + bool has_mii = false; /* For the C3000 family of SoCs (x550em_a) the internal ixgbe devices * are always downstream of root ports @ 0000:00:16.0 & 0000:00:17.0 @@ -884,15 +887,16 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw) func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x16, 0)); if (func0_pdev) { if (func0_pdev == pdev) - return true; - else - return false; + has_mii = true; + goto out; } func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x17, 0)); if (func0_pdev == pdev) - return true; + has_mii = true; - return false; +out: + pci_dev_put(func0_pdev); + return has_mii; } /**
As the comment of pci_get_domain_bus_and_slot() says, it returns a PCI device with refcount incremented, when finish using it, the caller must decrement the reference count by calling pci_dev_put(). In ixgbe_get_first_secondary_devfn() and ixgbe_x550em_a_has_mii(), pci_dev_put() is called to avoid leak. Fixes: 8fa10ef01260 ("ixgbe: register a mdiobus") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> --- v1 -> v2: Introduce a local variable, and put pci_dev_put() after value checks. --- drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)