| Message ID | 20230104215835.24692-1-farosas@suse.de (mailing list archive) |
|---|---|
| Headers | show |
| Series | target/arm: Allow CONFIG_TCG=n builds | expand |
On 1/4/23 13:58, Fabiano Rosas wrote: > Code moved verbatim, except for a couple of ifdef CONFIG_TCG that were > dropped. > > Signed-off-by: Fabiano Rosas<farosas@suse.de> > --- > Extracted from: > https://lore.kernel.org/r/20210416162824.25131-15-cfontana@suse.de > [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c > --- > target/arm/cpu.c | 1 + > target/arm/helper.c | 8081 ------------------------------- > target/arm/machine.c | 1 + > target/arm/tcg/cpregs.c | 8088 ++++++++++++++++++++++++++++++++ > target/arm/tcg/meson.build | 1 + > target/arm/tcg/op_helper.c | 1 + > target/arm/tcg/translate-a64.c | 1 + > target/arm/tcg/translate.c | 1 + > 8 files changed, 8094 insertions(+), 8081 deletions(-) > create mode 100644 target/arm/tcg/cpregs.c No, these data structures are used by kvm too, via write_cpustate_to_list -> get_arm_cp_reginfo. The code movement out of helper.c is desired, but the cpregs.c file should not be in tcg/. r~
This series makes the necessary changes to allow the use of --disable-tcg for arm. I have included the other two already reviewed series to facilitate the merge. Patch 12 is the first from this series proper. I could use some help with the last two patches which deal with the fact that ptw.c needs CPUTLBEntryFull and probe_access_full which are _currently_ only compiled with CONFIG_TCG=y. The 3 cpregs patches were split from the larger commit[1] from the original series. We're still left with one huge patch, but it is only code movement, it can be checked with: diff -u <(sed -n 's/^-//p' patch) <(sed -n 's/^\+//p' patch) 1- [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c https://lore.kernel.org/r/20210416162824.25131-15-cfontana@suse.de Claudio Fontana (12): target/arm: cleanup cpu includes target/arm: rename handle_semihosting to tcg_handle_semihosting target/arm: wrap psci call with tcg_enabled target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() target/arm: only perform TCG cpu and machine inits if TCG enabled target/arm: move translate modules to tcg/ target/arm: move helpers to tcg/ target/arm: only build psci for TCG target/arm: make further preparation for the exception code to move tests: do not run test-hmp on all machines for ARM KVM-only tests: do not run qom-test on all machines for ARM KVM-only tests: device-introspect-test: cope with ARM TCG-only devices Fabiano Rosas (15): target/arm: Fix checkpatch comment style warnings in helper.c target/arm: Fix checkpatch space errors in helper.c target/arm: Fix checkpatch brace errors in helper.c target/arm: Remove unused includes from m_helper.c target/arm: Remove unused includes from helper.c target/arm: Move PC alignment check target/arm: Add tcg/meson.build target/arm: Move regime_using_lpae_format into internal.h target/arm: Extract cpustate list manipulation to a file target/arm: Move cpregs code out of cpu.h target/arm: Move common cpregs code into a separate file target/arm: Move cpregs definitions into tcg/cpregs.c target/arm: Move hflags code into the tcg directory cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code target/arm: don't access TCG code when debugging with KVM MAINTAINERS | 1 + hw/arm/boot.c | 5 +- include/exec/cpu-defs.h | 6 + target/arm/arm-powerctl.c | 8 +- target/arm/cpregs.c | 482 ++ target/arm/cpregs.h | 103 + target/arm/cpu.c | 33 +- target/arm/cpu.h | 91 - target/arm/cpu64.c | 6 - target/arm/cpustate-list.c | 148 + target/arm/helper.c | 9132 +---------------------- target/arm/internals.h | 20 +- target/arm/kvm.c | 18 +- target/arm/kvm_arm.h | 3 +- target/arm/machine.c | 58 +- target/arm/meson.build | 49 +- target/arm/ptw.c | 4 + target/arm/tcg-stubs.c | 37 + target/arm/{ => tcg}/a32-uncond.decode | 0 target/arm/{ => tcg}/a32.decode | 0 target/arm/tcg/cpregs.c | 8088 ++++++++++++++++++++ target/arm/{ => tcg}/crypto_helper.c | 0 target/arm/{ => tcg}/debug_helper.c | 0 target/arm/{ => tcg}/helper-a64.c | 0 target/arm/tcg/hflags.c | 344 + target/arm/{ => tcg}/iwmmxt_helper.c | 0 target/arm/{ => tcg}/m-nocp.decode | 0 target/arm/{ => tcg}/m_helper.c | 16 - target/arm/tcg/meson.build | 52 + target/arm/{ => tcg}/mte_helper.c | 0 target/arm/{ => tcg}/mve.decode | 0 target/arm/{ => tcg}/mve_helper.c | 0 target/arm/{ => tcg}/neon-dp.decode | 0 target/arm/{ => tcg}/neon-ls.decode | 0 target/arm/{ => tcg}/neon-shared.decode | 0 target/arm/{ => tcg}/neon_helper.c | 0 target/arm/{ => tcg}/op_helper.c | 1 + target/arm/{ => tcg}/pauth_helper.c | 0 target/arm/{ => tcg}/psci.c | 0 target/arm/{ => tcg}/sme-fa64.decode | 0 target/arm/{ => tcg}/sme.decode | 0 target/arm/{ => tcg}/sme_helper.c | 0 target/arm/{ => tcg}/sve.decode | 0 target/arm/{ => tcg}/sve_helper.c | 0 target/arm/{ => tcg}/t16.decode | 0 target/arm/{ => tcg}/t32.decode | 0 target/arm/{ => tcg}/tlb_helper.c | 14 - target/arm/{ => tcg}/translate-a64.c | 1 + target/arm/{ => tcg}/translate-a64.h | 0 target/arm/{ => tcg}/translate-m-nocp.c | 0 target/arm/{ => tcg}/translate-mve.c | 0 target/arm/{ => tcg}/translate-neon.c | 0 target/arm/{ => tcg}/translate-sme.c | 0 target/arm/{ => tcg}/translate-sve.c | 0 target/arm/{ => tcg}/translate-vfp.c | 0 target/arm/{ => tcg}/translate.c | 1 + target/arm/{ => tcg}/translate.h | 0 target/arm/{ => tcg}/vec_helper.c | 0 target/arm/{ => tcg}/vec_internal.h | 0 target/arm/{ => tcg}/vfp-uncond.decode | 0 target/arm/{ => tcg}/vfp.decode | 0 tests/qtest/device-introspect-test.c | 32 +- tests/qtest/qom-test.c | 21 + tests/qtest/test-hmp.c | 21 + 64 files changed, 9551 insertions(+), 9244 deletions(-) create mode 100644 target/arm/cpregs.c create mode 100644 target/arm/cpustate-list.c create mode 100644 target/arm/tcg-stubs.c rename target/arm/{ => tcg}/a32-uncond.decode (100%) rename target/arm/{ => tcg}/a32.decode (100%) create mode 100644 target/arm/tcg/cpregs.c rename target/arm/{ => tcg}/crypto_helper.c (100%) rename target/arm/{ => tcg}/debug_helper.c (100%) rename target/arm/{ => tcg}/helper-a64.c (100%) create mode 100644 target/arm/tcg/hflags.c rename target/arm/{ => tcg}/iwmmxt_helper.c (100%) rename target/arm/{ => tcg}/m-nocp.decode (100%) rename target/arm/{ => tcg}/m_helper.c (99%) create mode 100644 target/arm/tcg/meson.build rename target/arm/{ => tcg}/mte_helper.c (100%) rename target/arm/{ => tcg}/mve.decode (100%) rename target/arm/{ => tcg}/mve_helper.c (100%) rename target/arm/{ => tcg}/neon-dp.decode (100%) rename target/arm/{ => tcg}/neon-ls.decode (100%) rename target/arm/{ => tcg}/neon-shared.decode (100%) rename target/arm/{ => tcg}/neon_helper.c (100%) rename target/arm/{ => tcg}/op_helper.c (99%) rename target/arm/{ => tcg}/pauth_helper.c (100%) rename target/arm/{ => tcg}/psci.c (100%) rename target/arm/{ => tcg}/sme-fa64.decode (100%) rename target/arm/{ => tcg}/sme.decode (100%) rename target/arm/{ => tcg}/sme_helper.c (100%) rename target/arm/{ => tcg}/sve.decode (100%) rename target/arm/{ => tcg}/sve_helper.c (100%) rename target/arm/{ => tcg}/t16.decode (100%) rename target/arm/{ => tcg}/t32.decode (100%) rename target/arm/{ => tcg}/tlb_helper.c (95%) rename target/arm/{ => tcg}/translate-a64.c (99%) rename target/arm/{ => tcg}/translate-a64.h (100%) rename target/arm/{ => tcg}/translate-m-nocp.c (100%) rename target/arm/{ => tcg}/translate-mve.c (100%) rename target/arm/{ => tcg}/translate-neon.c (100%) rename target/arm/{ => tcg}/translate-sme.c (100%) rename target/arm/{ => tcg}/translate-sve.c (100%) rename target/arm/{ => tcg}/translate-vfp.c (100%) rename target/arm/{ => tcg}/translate.c (99%) rename target/arm/{ => tcg}/translate.h (100%) rename target/arm/{ => tcg}/vec_helper.c (100%) rename target/arm/{ => tcg}/vec_internal.h (100%) rename target/arm/{ => tcg}/vfp-uncond.decode (100%) rename target/arm/{ => tcg}/vfp.decode (100%)