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[v2,0/5] target/arm: Some CONFIG_TCG code movement

Message ID 20221220220426.8827-1-farosas@suse.de (mailing list archive)
Headers show
Series target/arm: Some CONFIG_TCG code movement | expand

Message

Fabiano Rosas Dec. 20, 2022, 10:04 p.m. UTC
since v1:
- patch 1: dropped. I will include it in the next series;

- patch 3: tcg_handle_semihosting does not need tcg_enabled, only
  CONFIG_TCG;

- patch 4 (new): moved alignment check and updated comment.

v1:
https://lore.kernel.org/r/20221216212944.28229-1-farosas@suse.de

Hi,

This is the second round of rebasing the patches from:
https://lore.kernel.org/r/20210416162824.25131-1-cfontana@suse.de

These are the simpler ones that move code under
CONFIG_TCG/tcg_enabled. No new directories or files.

Claudio Fontana (4):
  target/arm: rename handle_semihosting to tcg_handle_semihosting
  target/arm: wrap psci call with tcg_enabled
  target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
  target/arm: only perform TCG cpu and machine inits if TCG enabled

Fabiano Rosas (1):
  target/arm: Move PC alignment check

 target/arm/cpu.c     | 31 ++++++++++++++----------
 target/arm/helper.c  | 19 ++++++++-------
 target/arm/kvm.c     | 18 +++++++-------
 target/arm/kvm_arm.h |  3 +--
 target/arm/machine.c | 57 +++++++++++++++++++++++++-------------------
 5 files changed, 71 insertions(+), 57 deletions(-)

Comments

Fabiano Rosas Jan. 5, 2023, 2:46 p.m. UTC | #1
Fabiano Rosas <farosas@suse.de> writes:

> since v1:
> - patch 1: dropped. I will include it in the next series;
>
> - patch 3: tcg_handle_semihosting does not need tcg_enabled, only
>   CONFIG_TCG;
>
> - patch 4 (new): moved alignment check and updated comment.
>
> v1:
> https://lore.kernel.org/r/20221216212944.28229-1-farosas@suse.de
>
> Hi,
>
> This is the second round of rebasing the patches from:
> https://lore.kernel.org/r/20210416162824.25131-1-cfontana@suse.de
>
> These are the simpler ones that move code under
> CONFIG_TCG/tcg_enabled. No new directories or files.
>
> Claudio Fontana (4):
>   target/arm: rename handle_semihosting to tcg_handle_semihosting
>   target/arm: wrap psci call with tcg_enabled
>   target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
>   target/arm: only perform TCG cpu and machine inits if TCG enabled

Peter,

let's drop this series please. I need to double check patch 5.

I'll resend it later on all along with the v2 of my latest RFC:

  [RFC PATCH 00/27] target/arm: Allow CONFIG_TCG=n builds
  https://lore.kernel.org/r/20230104215835.24692-1-farosas@suse.de