| Message ID | 20230112135117.3836655-1-quic_bjorande@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | fe07640280cd29ac2997a617a1fb5487feef9387 |
| Headers | show |
| Series | arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers | expand |
On 12.01.2023 14:51, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 Maybe in the future there could be some power savings for lower freqs.. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 2ed17baf50d3..4f4353f84cba 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_PRIM_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_SEC_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_SEC_BCR>; >
On Thu, Jan 12, 2023 at 05:51:17AM -0800, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 2ed17baf50d3..4f4353f84cba 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_PRIM_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > "ss_phy_irq"; > > power-domains = <&gcc USB30_SEC_GDSC>; > + required-opps = <&rpmhpd_opp_nom>; > > resets = <&gcc GCC_USB30_SEC_BCR>; Looks good. Perhaps you can send a binding patch adding 'required-oops' as well. Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Johan
On Thu, 12 Jan 2023 05:51:17 -0800, Bjorn Andersson wrote: > Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > not doing so results in occasional lockups. This was previously hidden > by the fact that the display stack incorrectly voted for CX (instead of > MMCX). > > Applied, thanks! [1/1] arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers commit: fe07640280cd29ac2997a617a1fb5487feef9387 Best regards,
12 января 2023 г. 16:21:14 GMT+02:00, Konrad Dybcio <konrad.dybcio@linaro.org> пишет: > > >On 12.01.2023 14:51, Bjorn Andersson wrote: >> Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, >> not doing so results in occasional lockups. This was previously hidden >> by the fact that the display stack incorrectly voted for CX (instead of >> MMCX). >> >> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") >> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> >> ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 > >Maybe in the future there could be some power savings for lower freqs.. I had the same question. If the vote is not static, but depends on the freq, shouldn't this be to implemented as an opp + table? > >Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > >Konrad >> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> index 2ed17baf50d3..4f4353f84cba 100644 >> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi >> @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { >> "ss_phy_irq"; >> >> power-domains = <&gcc USB30_PRIM_GDSC>; >> + required-opps = <&rpmhpd_opp_nom>; >> >> resets = <&gcc GCC_USB30_PRIM_BCR>; >> >> @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { >> "ss_phy_irq"; >> >> power-domains = <&gcc USB30_SEC_GDSC>; >> + required-opps = <&rpmhpd_opp_nom>; >> >> resets = <&gcc GCC_USB30_SEC_BCR>; >>
On Thu, Jan 12, 2023 at 07:00:29PM +0200, Dmitry Baryshkov wrote: > 12 января 2023 г. 16:21:14 GMT+02:00, Konrad Dybcio <konrad.dybcio@linaro.org> пишет: > > > > > >On 12.01.2023 14:51, Bjorn Andersson wrote: > >> Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, > >> not doing so results in occasional lockups. This was previously hidden > >> by the fact that the display stack incorrectly voted for CX (instead of > >> MMCX). > >> > >> Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > >> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > >> ---https://git.codelinaro.org/clo/la/kernel/msm-5.4/-/blob/LV.AU.1.2.3.r1-03600-gen3meta.0/drivers/clk/qcom/gcc-direwolf.c#L2703-2725 > > > >Maybe in the future there could be some power savings for lower freqs.. > > I had the same question. If the vote is not static, but depends on the > freq, shouldn't this be to implemented as an opp + table? > The upstream Linux driver does not dynamically adjust the rate of the core clock, so whenever the device isn't suspended it will tick at 200MHz and require nominal voltage. The downstream driver does adjust the core clock rate based on the link, and can thereby adjust the voltage level as well. So once this is supported upstream, replacing this with an opp-table would be appropriate. Regards, Bjorn > > > > >Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > > >Konrad > >> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> index 2ed17baf50d3..4f4353f84cba 100644 > >> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > >> @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { > >> "ss_phy_irq"; > >> > >> power-domains = <&gcc USB30_PRIM_GDSC>; > >> + required-opps = <&rpmhpd_opp_nom>; > >> > >> resets = <&gcc GCC_USB30_PRIM_BCR>; > >> > >> @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { > >> "ss_phy_irq"; > >> > >> power-domains = <&gcc USB30_SEC_GDSC>; > >> + required-opps = <&rpmhpd_opp_nom>; > >> > >> resets = <&gcc GCC_USB30_SEC_BCR>; > >> >
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 2ed17baf50d3..4f4353f84cba 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -2265,6 +2265,7 @@ usb_0: usb@a6f8800 { "ss_phy_irq"; power-domains = <&gcc USB30_PRIM_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_USB30_PRIM_BCR>; @@ -2319,6 +2320,7 @@ usb_1: usb@a8f8800 { "ss_phy_irq"; power-domains = <&gcc USB30_SEC_GDSC>; + required-opps = <&rpmhpd_opp_nom>; resets = <&gcc GCC_USB30_SEC_BCR>;
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, not doing so results in occasional lockups. This was previously hidden by the fact that the display stack incorrectly voted for CX (instead of MMCX). Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 ++ 1 file changed, 2 insertions(+)