diff mbox series

[2/2] drm/msm/dsi: Add phy configuration for SM6375

Message ID 20230116114059.346327-2-konrad.dybcio@linaro.org (mailing list archive)
State New, archived
Headers show
Series [1/2] dt-bindings: display/msm: Add SM6375 DSI PHY | expand

Commit Message

Konrad Dybcio Jan. 16, 2023, 11:40 a.m. UTC 
From: Konrad Dybcio <konrad.dybcio@somainline.org>

SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
Depends on [1] to work properly, but won't hurt for it to land
separately..

[1] https://patchwork.kernel.org/project/linux-arm-msm/patch/1642586079-12472-1-git-send-email-loic.poulain@linaro.org/

 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c     |  2 ++
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h     |  1 +
 drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 20 ++++++++++++++++++++
 3 files changed, 23 insertions(+)

Comments

Konrad Dybcio Jan. 16, 2023, 11:42 a.m. UTC | #1 
On 16.01.2023 12:40, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@somainline.org>
> 
> SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> ---
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Sorry, bit messy revisiting old patches before the email change..

Konrad
> Depends on [1] to work properly, but won't hurt for it to land
> separately..
> 
> [1] https://patchwork.kernel.org/project/linux-arm-msm/patch/1642586079-12472-1-git-send-email-loic.poulain@linaro.org/
> 
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.c     |  2 ++
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.h     |  1 +
>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 20 ++++++++++++++++++++
>  3 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index cbe669fca26d..57445a5dc816 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -569,6 +569,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
>  	  .data = &dsi_phy_7nm_8150_cfgs },
>  	{ .compatible = "qcom,sc7280-dsi-phy-7nm",
>  	  .data = &dsi_phy_7nm_7280_cfgs },
> +	{ .compatible = "qcom,sm6375-dsi-phy-7nm",
> +	  .data = &dsi_phy_7nm_6375_cfgs },
>  	{ .compatible = "qcom,sm8350-dsi-phy-5nm",
>  	  .data = &dsi_phy_5nm_8350_cfgs },
>  	{ .compatible = "qcom,sm8450-dsi-phy-5nm",
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> index 5f0b1c9b09ef..c849bfd7494e 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> @@ -55,6 +55,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;
> +extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
>  extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs;
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> index af5c952c6ad0..3b1ed02f644d 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> @@ -1152,6 +1152,26 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
>  	.quirks = DSI_PHY_7NM_QUIRK_V4_1,
>  };
>  
> +const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs = {
> +	.has_phy_lane = true,
> +	.ops = {
> +		.enable = dsi_7nm_phy_enable,
> +		.disable = dsi_7nm_phy_disable,
> +		.pll_init = dsi_pll_7nm_init,
> +		.save_pll_state = dsi_7nm_pll_save_state,
> +		.restore_pll_state = dsi_7nm_pll_restore_state,
> +	},
> +	.min_pll_rate = 600000000UL,
> +#ifdef CONFIG_64BIT
> +	.max_pll_rate = 5000000000ULL,
> +#else
> +	.max_pll_rate = ULONG_MAX,
> +#endif
> +	.io_start = { 0x5e94400 },
> +	.num_dsi_phy = 1,
> +	.quirks = DSI_PHY_7NM_QUIRK_V4_1,
> +};
> +
>  const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = {
>  	.has_phy_lane = true,
>  	.regulator_data = dsi_phy_7nm_36mA_regulators,
Dmitry Baryshkov Jan. 16, 2023, 11:47 a.m. UTC | #2 
On Mon, 16 Jan 2023 at 13:42, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
>
>
> On 16.01.2023 12:40, Konrad Dybcio wrote:
> > From: Konrad Dybcio <konrad.dybcio@somainline.org>
> >
> > SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it.
> >
> > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> > ---
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> Sorry, bit messy revisiting old patches before the email change..
>
> Konrad
> > Depends on [1] to work properly, but won't hurt for it to land
> > separately..
> >
> > [1] https://patchwork.kernel.org/project/linux-arm-msm/patch/1642586079-12472-1-git-send-email-loic.poulain@linaro.org/
> >
> >  drivers/gpu/drm/msm/dsi/phy/dsi_phy.c     |  2 ++
> >  drivers/gpu/drm/msm/dsi/phy/dsi_phy.h     |  1 +
> >  drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 20 ++++++++++++++++++++
> >  3 files changed, 23 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> > index cbe669fca26d..57445a5dc816 100644
> > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> > @@ -569,6 +569,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
> >         .data = &dsi_phy_7nm_8150_cfgs },
> >       { .compatible = "qcom,sc7280-dsi-phy-7nm",
> >         .data = &dsi_phy_7nm_7280_cfgs },
> > +     { .compatible = "qcom,sm6375-dsi-phy-7nm",
> > +       .data = &dsi_phy_7nm_6375_cfgs },
> >       { .compatible = "qcom,sm8350-dsi-phy-5nm",
> >         .data = &dsi_phy_5nm_8350_cfgs },
> >       { .compatible = "qcom,sm8450-dsi-phy-5nm",
> > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> > index 5f0b1c9b09ef..c849bfd7494e 100644
> > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
> > @@ -55,6 +55,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;
> > +extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
> >  extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs;
> > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> > index af5c952c6ad0..3b1ed02f644d 100644
> > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
> > @@ -1152,6 +1152,26 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
> >       .quirks = DSI_PHY_7NM_QUIRK_V4_1,
> >  };
> >
> > +const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs = {
> > +     .has_phy_lane = true,

Any regulators here?

> > +     .ops = {
> > +             .enable = dsi_7nm_phy_enable,
> > +             .disable = dsi_7nm_phy_disable,
> > +             .pll_init = dsi_pll_7nm_init,
> > +             .save_pll_state = dsi_7nm_pll_save_state,
> > +             .restore_pll_state = dsi_7nm_pll_restore_state,
> > +     },
> > +     .min_pll_rate = 600000000UL,
> > +#ifdef CONFIG_64BIT
> > +     .max_pll_rate = 5000000000ULL,
> > +#else
> > +     .max_pll_rate = ULONG_MAX,
> > +#endif
> > +     .io_start = { 0x5e94400 },
> > +     .num_dsi_phy = 1,
> > +     .quirks = DSI_PHY_7NM_QUIRK_V4_1,
> > +};
> > +
> >  const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = {
> >       .has_phy_lane = true,
> >       .regulator_data = dsi_phy_7nm_36mA_regulators,
Konrad Dybcio Jan. 16, 2023, 11:49 a.m. UTC | #3 
On 16.01.2023 12:47, Dmitry Baryshkov wrote:
> On Mon, 16 Jan 2023 at 13:42, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>>
>>
>> On 16.01.2023 12:40, Konrad Dybcio wrote:
>>> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>>>
>>> SM6375 uses a boring standard 7nm PHY. Add a configuration entry for it.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>>> ---
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>
>> Sorry, bit messy revisiting old patches before the email change..
>>
>> Konrad
>>> Depends on [1] to work properly, but won't hurt for it to land
>>> separately..
>>>
>>> [1] https://patchwork.kernel.org/project/linux-arm-msm/patch/1642586079-12472-1-git-send-email-loic.poulain@linaro.org/
>>>
>>>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.c     |  2 ++
>>>  drivers/gpu/drm/msm/dsi/phy/dsi_phy.h     |  1 +
>>>  drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 20 ++++++++++++++++++++
>>>  3 files changed, 23 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
>>> index cbe669fca26d..57445a5dc816 100644
>>> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
>>> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
>>> @@ -569,6 +569,8 @@ static const struct of_device_id dsi_phy_dt_match[] = {
>>>         .data = &dsi_phy_7nm_8150_cfgs },
>>>       { .compatible = "qcom,sc7280-dsi-phy-7nm",
>>>         .data = &dsi_phy_7nm_7280_cfgs },
>>> +     { .compatible = "qcom,sm6375-dsi-phy-7nm",
>>> +       .data = &dsi_phy_7nm_6375_cfgs },
>>>       { .compatible = "qcom,sm8350-dsi-phy-5nm",
>>>         .data = &dsi_phy_5nm_8350_cfgs },
>>>       { .compatible = "qcom,sm8450-dsi-phy-5nm",
>>> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
>>> index 5f0b1c9b09ef..c849bfd7494e 100644
>>> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
>>> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
>>> @@ -55,6 +55,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;
>>> +extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
>>>  extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs;
>>> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
>>> index af5c952c6ad0..3b1ed02f644d 100644
>>> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
>>> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
>>> @@ -1152,6 +1152,26 @@ const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
>>>       .quirks = DSI_PHY_7NM_QUIRK_V4_1,
>>>  };
>>>
>>> +const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs = {
>>> +     .has_phy_lane = true,
> 
> Any regulators here?
Nope, looks like 7nm also deserves a "don't require vdds-supply"
patch, gonna send it right away..

Konrad
> 
>>> +     .ops = {
>>> +             .enable = dsi_7nm_phy_enable,
>>> +             .disable = dsi_7nm_phy_disable,
>>> +             .pll_init = dsi_pll_7nm_init,
>>> +             .save_pll_state = dsi_7nm_pll_save_state,
>>> +             .restore_pll_state = dsi_7nm_pll_restore_state,
>>> +     },
>>> +     .min_pll_rate = 600000000UL,
>>> +#ifdef CONFIG_64BIT
>>> +     .max_pll_rate = 5000000000ULL,
>>> +#else
>>> +     .max_pll_rate = ULONG_MAX,
>>> +#endif
>>> +     .io_start = { 0x5e94400 },
>>> +     .num_dsi_phy = 1,
>>> +     .quirks = DSI_PHY_7NM_QUIRK_V4_1,
>>> +};
>>> +
>>>  const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = {
>>>       .has_phy_lane = true,
>>>       .regulator_data = dsi_phy_7nm_36mA_regulators,
> 
> 
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index cbe669fca26d..57445a5dc816 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -569,6 +569,8 @@  static const struct of_device_id dsi_phy_dt_match[] = {
 	  .data = &dsi_phy_7nm_8150_cfgs },
 	{ .compatible = "qcom,sc7280-dsi-phy-7nm",
 	  .data = &dsi_phy_7nm_7280_cfgs },
+	{ .compatible = "qcom,sm6375-dsi-phy-7nm",
+	  .data = &dsi_phy_7nm_6375_cfgs },
 	{ .compatible = "qcom,sm8350-dsi-phy-5nm",
 	  .data = &dsi_phy_5nm_8350_cfgs },
 	{ .compatible = "qcom,sm8450-dsi-phy-5nm",
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 5f0b1c9b09ef..c849bfd7494e 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -55,6 +55,7 @@  extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;
+extern const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_7nm_7280_cfgs;
 extern const struct msm_dsi_phy_cfg dsi_phy_5nm_8350_cfgs;
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
index af5c952c6ad0..3b1ed02f644d 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c
@@ -1152,6 +1152,26 @@  const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs = {
 	.quirks = DSI_PHY_7NM_QUIRK_V4_1,
 };
 
+const struct msm_dsi_phy_cfg dsi_phy_7nm_6375_cfgs = {
+	.has_phy_lane = true,
+	.ops = {
+		.enable = dsi_7nm_phy_enable,
+		.disable = dsi_7nm_phy_disable,
+		.pll_init = dsi_pll_7nm_init,
+		.save_pll_state = dsi_7nm_pll_save_state,
+		.restore_pll_state = dsi_7nm_pll_restore_state,
+	},
+	.min_pll_rate = 600000000UL,
+#ifdef CONFIG_64BIT
+	.max_pll_rate = 5000000000ULL,
+#else
+	.max_pll_rate = ULONG_MAX,
+#endif
+	.io_start = { 0x5e94400 },
+	.num_dsi_phy = 1,
+	.quirks = DSI_PHY_7NM_QUIRK_V4_1,
+};
+
 const struct msm_dsi_phy_cfg dsi_phy_7nm_8150_cfgs = {
 	.has_phy_lane = true,
 	.regulator_data = dsi_phy_7nm_36mA_regulators,