| Message ID | 20230116230159.1511393-1-kim.phillips@amd.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | x86/cpu, kvm: Support AMD Automatic IBRS | expand |
On Mon, Jan 16, 2023 at 05:01:52PM -0600, Kim Phillips wrote: > Kim Phillips (7): > x86/cpu, kvm: Add support for cpuid leaf 80000021/EAX (FeatureExt2Eax) > x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature > x86/cpu, kvm: Move the LFENCE_RDTSC / LFENCE always serializing > feature > x86/cpu, kvm: Add the Null Selector Clears Base feature > x86/cpu, kvm: Add the SMM_CTL MSR not present feature > x86/cpu: Support AMD Automatic IBRS > x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest > > Documentation/admin-guide/hw-vuln/spectre.rst | 6 ++-- > .../admin-guide/kernel-parameters.txt | 6 ++-- > arch/x86/include/asm/cpufeature.h | 7 +++-- > arch/x86/include/asm/cpufeatures.h | 11 +++++-- > arch/x86/include/asm/disabled-features.h | 3 +- > arch/x86/include/asm/msr-index.h | 2 ++ > arch/x86/include/asm/required-features.h | 3 +- > arch/x86/kernel/cpu/amd.c | 2 +- > arch/x86/kernel/cpu/bugs.c | 20 ++++++++----- > arch/x86/kernel/cpu/common.c | 22 +++++++++----- > arch/x86/kvm/cpuid.c | 30 +++++++------------ > arch/x86/kvm/reverse_cpuid.h | 1 + > arch/x86/kvm/svm/svm.c | 3 ++ > arch/x86/kvm/x86.c | 3 ++ > 14 files changed, 71 insertions(+), 48 deletions(-) KVM folks, I'm going to route this through the tip tree, along with the KVM bits. Holler if we should do something else to avoid any potential conflicts. Thx.
On Tue, Jan 17, 2023, Borislav Petkov wrote: > On Mon, Jan 16, 2023 at 05:01:52PM -0600, Kim Phillips wrote: > > > Kim Phillips (7): > > x86/cpu, kvm: Add support for cpuid leaf 80000021/EAX (FeatureExt2Eax) > > x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature > > x86/cpu, kvm: Move the LFENCE_RDTSC / LFENCE always serializing > > feature > > x86/cpu, kvm: Add the Null Selector Clears Base feature > > x86/cpu, kvm: Add the SMM_CTL MSR not present feature > > x86/cpu: Support AMD Automatic IBRS > > x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest > > > > Documentation/admin-guide/hw-vuln/spectre.rst | 6 ++-- > > .../admin-guide/kernel-parameters.txt | 6 ++-- > > arch/x86/include/asm/cpufeature.h | 7 +++-- > > arch/x86/include/asm/cpufeatures.h | 11 +++++-- > > arch/x86/include/asm/disabled-features.h | 3 +- > > arch/x86/include/asm/msr-index.h | 2 ++ > > arch/x86/include/asm/required-features.h | 3 +- > > arch/x86/kernel/cpu/amd.c | 2 +- > > arch/x86/kernel/cpu/bugs.c | 20 ++++++++----- > > arch/x86/kernel/cpu/common.c | 22 +++++++++----- > > arch/x86/kvm/cpuid.c | 30 +++++++------------ > > arch/x86/kvm/reverse_cpuid.h | 1 + > > arch/x86/kvm/svm/svm.c | 3 ++ > > arch/x86/kvm/x86.c | 3 ++ > > 14 files changed, 71 insertions(+), 48 deletions(-) > > KVM folks, > > I'm going to route this through the tip tree, along with the KVM bits. > > Holler if we should do something else to avoid any potential conflicts. Sorry, completely missed this. There will be a minor conflict in KVM's reverse_cpuid, but it's trivial to resolve. I don't anticipate any other conflicts, so taking this through tip does seem like the best option. If possible, a new version to fix the bisection issues in patches 2 and 3 would be nice, but again it's not a big deal. The breakage is very, very minor.
On Fri, Jan 20, 2023 at 01:40:13AM +0000, Sean Christopherson wrote: > Sorry, completely missed this. Nothing to be sorry for - can't notice everything in the flood. :) > There will be a minor conflict in KVM's reverse_cpuid, but it's trivial to resolve. > I don't anticipate any other conflicts, so taking this through tip does seem like > the best option. Ok, thx. > If possible, a new version to fix the bisection issues in patches 2 and 3 would > be nice, but again it's not a big deal. The breakage is very, very minor. Yap, I've zapped them and their removal will take a bit to propagate to linux-next. Thx.
The AMD Zen4 core supports a new feature called Automatic IBRS (Indirect Branch Restricted Speculation). Enable Automatic IBRS by default if the CPU feature is present. It typically provides greater performance over the incumbent generic retpolines mitigation. Patch 1 adds support for the whole leaf that contains the AutoIBRS feature bit. Patches 2-5 mainly move the existing features over from scattered / open-coded in KVM into the new shared leaf, where they match hardware. Patch 6 Adds support for AutoIBRS by turning its EFER enablement bit on at startup if the feature is available. Patch 7 Adds support for propagating AutoIBRS to the guest. v7: - Add Dave Hansen's Acked-by to unchanged patch 6/7 - Change patch 3/7 to not bother to set MSR DE_CFG[1] if X86_FEATURE_LFENCE_RDTSC is already set [Boris] - v6 went out with two 1/1's, try to not do that again v6: https://lore.kernel.org/lkml/20230110224643.452273-1-kim.phillips@amd.com/ Address v5 comment from Boris: - Move CPUID leaf 0x8000021 EAX feature bits from scattered to the new whole leaf since the majority of the features will be used in the kernel and thus a separate leaf is appropriate. v5: https://lore.kernel.org/lkml/20221205233235.622491-1-kim.phillips@amd.com/ Address v4 comments from Dave Hansen, Pawan Gupta, and Boris: - Don't add new user-visible 'autoibrs' command line options that we have to document: reuse 'eibrs' - Update Documentation/admin-guide/hw-vuln/spectre.rst - Add NO_EIBRS_PBRSB to Hygon as well - Re-word commit texts to not use words like 'us' v4: https://lore.kernel.org/lkml/20221201015003.295769-8-kim.phillips@amd.com/ Moved some kvm bits that had crept into patch 6/7 back into 7/7, and addressed v3 comments: - Don't put ", kvm" in titles of patches that don't touch kvm. [SeanC] - () after function names, i.e. kvm_set_cpu_caps(). [SeanC] - follow the established kvm_cpu_cap_init_scattered() style [SeanC] - Add using cpu_feature_enabled() instead of static_cpu_has() to commit text [SeanC] - Pawan Gupta mentioned that the ordering of enabling the Intel feature bit past Intel EIBRS bug detection could be avoided by setting NO_EIBRS_PBRSB to cpu_vuln_whitelist, so did that which allowed regrouping all EIBRS related code to one place in cpu_set_bug_bits(). v3: https://lore.kernel.org/lkml/20221129235816.188737-1-kim.phillips@amd.com/ - Remove Co-developed-bys. They require signed-off-bys, so co-developers need to add them themselves. - update check_null_seg_clears_base() [Boris] - Made the feature bit additions separate patches because v2 patch was clearly doing too many things at once. v2: https://lore.kernel.org/lkml/20221124000449.79014-1-kim.phillips@amd.com/ https://lkml.org/lkml/2022/11/23/1690 - Use synthetic/scattered bits instead of introducing new leaf [Boris] - Combine the rest of the leaf's bits being used [Paolo] Note: Bits not used by the host can be moved to kvm/cpuid.c if maintainers do not want them in cpufeatures.h. - Hoist bitsetting code to kvm_set_cpu_caps(), and use cpuid_entry_override() in __do_cpuid_func() [Paolo] - Reuse SPECTRE_V2_EIBRS spectre_v2_mitigation enum [Boris, PeterZ, D.Hansen] - Change from Boris' diff: Moved setting X86_FEATURE_IBRS_ENHANCED to after BUG_EIBRS_PBRSB so PBRSB mitigations wouldn't be enabled. - Allow for users to specify "autoibrs,lfence/retpoline" instead of actively preventing the extra protections. AutoIBRS doesn't require the extra protection, but we allow it anyway. v1: https://lore.kernel.org/lkml/20221104213651.141057-1-kim.phillips@amd.com/ Signed-off-by: Kim Phillips <kim.phillips@amd.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Joao Martins <joao.m.martins@oracle.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: David Woodhouse <dwmw@amazon.co.uk> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Juergen Gross <jgross@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Alexey Kardashevskiy <aik@amd.com> Cc: kvm@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org Kim Phillips (7): x86/cpu, kvm: Add support for cpuid leaf 80000021/EAX (FeatureExt2Eax) x86/cpu, kvm: Add the NO_NESTED_DATA_BP feature x86/cpu, kvm: Move the LFENCE_RDTSC / LFENCE always serializing feature x86/cpu, kvm: Add the Null Selector Clears Base feature x86/cpu, kvm: Add the SMM_CTL MSR not present feature x86/cpu: Support AMD Automatic IBRS x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest Documentation/admin-guide/hw-vuln/spectre.rst | 6 ++-- .../admin-guide/kernel-parameters.txt | 6 ++-- arch/x86/include/asm/cpufeature.h | 7 +++-- arch/x86/include/asm/cpufeatures.h | 11 +++++-- arch/x86/include/asm/disabled-features.h | 3 +- arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/include/asm/required-features.h | 3 +- arch/x86/kernel/cpu/amd.c | 2 +- arch/x86/kernel/cpu/bugs.c | 20 ++++++++----- arch/x86/kernel/cpu/common.c | 22 +++++++++----- arch/x86/kvm/cpuid.c | 30 +++++++------------ arch/x86/kvm/reverse_cpuid.h | 1 + arch/x86/kvm/svm/svm.c | 3 ++ arch/x86/kvm/x86.c | 3 ++ 14 files changed, 71 insertions(+), 48 deletions(-)