diff mbox series

[v2] dmaengine: tegra210-adma: fix global intr clear

Message ID 20230102064844.31306-1-mkumard@nvidia.com (mailing list archive)
State Accepted
Commit 9c7e355ccbb33d239360c876dbe49ad5ade65b47
Headers show
Series [v2] dmaengine: tegra210-adma: fix global intr clear | expand

Commit Message

Mohan Kumar D Jan. 2, 2023, 6:48 a.m. UTC 
The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset

Fixes: ded1f3db4cd6 ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")
Cc: stable@vger.kernel.org
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
---
 drivers/dma/tegra210-adma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Vinod Koul Jan. 18, 2023, 12:04 p.m. UTC | #1 
On 02-01-23, 12:18, Mohan Kumar wrote:
> The current global interrupt clear programming register offset
> was not correct. Fix the programming with right offset

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
index ae39b52012b2..79da93cc77b6 100644
--- a/drivers/dma/tegra210-adma.c
+++ b/drivers/dma/tegra210-adma.c
@@ -221,7 +221,7 @@  static int tegra_adma_init(struct tegra_adma *tdma)
 	int ret;
 
 	/* Clear any interrupts */
-	tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
+	tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
 
 	/* Assert soft reset */
 	tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);