diff mbox series

[v4,07/17] arch: arm64: imx8qm: add can node in devicetree

Message ID 20230118072656.18845-8-marcel@ziswiler.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: freescale: prepare and add apalis imx8 support | expand

Commit Message

Marcel Ziswiler Jan. 18, 2023, 7:26 a.m. UTC 
From: Joakim Zhang <qiangqing.zhang@nxp.com>

Add CAN node for imx8qm in devicetree.

Unlike on the i.MX 8QXP where the flexcan clocks are shared between
multiple CAN instances, the i.MX 8QM has separate flexcan clock slices.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

---

Changes in v4:
- New patch inspired by the following downstream patch:
  commit 117607e6a7b5 ("arm64: dts: imx8qm: add CAN node in devicetree")

 .../boot/dts/freescale/imx8qm-ss-dma.dtsi     | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)

Comments

Krzysztof Kozlowski Jan. 18, 2023, 1:58 p.m. UTC | #1 
On 18/01/2023 08:26, Marcel Ziswiler wrote:
> From: Joakim Zhang <qiangqing.zhang@nxp.com>
> 
> Add CAN node for imx8qm in devicetree.

Incorrect subject prefix.

Best regards,
Krzysztof
Marcel Ziswiler Jan. 18, 2023, 2:32 p.m. UTC | #2 
On Wed, 2023-01-18 at 14:58 +0100, Krzysztof Kozlowski wrote:
> On 18/01/2023 08:26, Marcel Ziswiler wrote:
> > From: Joakim Zhang <qiangqing.zhang@nxp.com>
> > 
> > Add CAN node for imx8qm in devicetree.
> 
> Incorrect subject prefix.

Sure, would you mind elaborating what the correct one would be?

> Best regards,
> Krzysztof
Krzysztof Kozlowski Jan. 18, 2023, 2:35 p.m. UTC | #3 
On 18/01/2023 15:32, Marcel Ziswiler wrote:
> On Wed, 2023-01-18 at 14:58 +0100, Krzysztof Kozlowski wrote:
>> On 18/01/2023 08:26, Marcel Ziswiler wrote:
>>> From: Joakim Zhang <qiangqing.zhang@nxp.com>
>>>
>>> Add CAN node for imx8qm in devicetree.
>>
>> Incorrect subject prefix.
> 
> Sure, would you mind elaborating what the correct one would be?

git log --oneline -- DIRECTORY_OR_FILE` will give you


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index bbe5f5ecfb92..e9b198c13b2f 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -16,6 +16,50 @@  uart4_lpcg: clock-controller@5a4a0000 {
 				     "uart4_lpcg_ipg_clk";
 		power-domains = <&pd IMX_SC_R_UART_4>;
 	};
+
+	can1_lpcg: clock-controller@5ace0000 {
+		compatible = "fsl,imx8qxp-lpcg";
+		reg = <0x5ace0000 0x10000>;
+		#clock-cells = <1>;
+		clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>,
+			 <&dma_ipg_clk>, <&dma_ipg_clk>;
+		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>;
+		clock-output-names = "can1_lpcg_pe_clk",
+				     "can1_lpcg_ipg_clk",
+				     "can1_lpcg_chi_clk";
+		power-domains = <&pd IMX_SC_R_CAN_1>;
+	};
+
+	can2_lpcg: clock-controller@5acf0000 {
+		compatible = "fsl,imx8qxp-lpcg";
+		reg = <0x5acf0000 0x10000>;
+		#clock-cells = <1>;
+		clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>,
+			 <&dma_ipg_clk>, <&dma_ipg_clk>;
+		clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>;
+		clock-output-names = "can2_lpcg_pe_clk",
+				     "can2_lpcg_ipg_clk",
+				     "can2_lpcg_chi_clk";
+		power-domains = <&pd IMX_SC_R_CAN_2>;
+	};
+};
+
+&flexcan1 {
+	fsl,clk-source = /bits/ 8 <1>;
+};
+
+&flexcan2 {
+	clocks = <&can1_lpcg 1>,
+		 <&can1_lpcg 0>;
+	assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>;
+	fsl,clk-source = /bits/ 8 <1>;
+};
+
+&flexcan3 {
+	clocks = <&can2_lpcg 1>,
+		 <&can2_lpcg 0>;
+	assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>;
+	fsl,clk-source = /bits/ 8 <1>;
 };
 
 &lpuart0 {