diff mbox series

[v2,2/2] ARM: dts: qcom: msm8226: add clocks and clock-names to gcc node

Message ID 20230119190534.317041-3-rayyan@ansari.sh (mailing list archive)
State Superseded
Headers show
Series Add XO clocks for MSM8226 | expand

Commit Message

Rayyan Ansari Jan. 19, 2023, 7:05 p.m. UTC
Add the XO and Sleep Clock sources to the GCC node.

Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
---
 arch/arm/boot/dts/qcom-msm8226.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Alexey Minnekhanov Jan. 19, 2023, 9:42 p.m. UTC | #1
Hi!

On 2023-01-19 22:05, Rayyan Ansari wrote:
> Add the XO and Sleep Clock sources to the GCC node.
> 
> Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
> ---
>   arch/arm/boot/dts/qcom-msm8226.dtsi | 6 ++++++

Should the same be done for msm8974 dtsi as well?
Konrad Dybcio Jan. 20, 2023, 3:07 p.m. UTC | #2
On 19.01.2023 22:42, Alexey Minnekhanov wrote:
> Hi!
> 
> On 2023-01-19 22:05, Rayyan Ansari wrote:
>> Add the XO and Sleep Clock sources to the GCC node.
>>
>> Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
>> ---
>>   arch/arm/boot/dts/qcom-msm8226.dtsi | 6 ++++++
> 
> Should the same be done for msm8974 dtsi as well?
yes

Konrad
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index c373081bc21b..42acb9ddb8cc 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -8,6 +8,7 @@ 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
@@ -377,6 +378,11 @@  gcc: clock-controller@fc400000 {
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
+
+			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+				 <&sleep_clk>;
+			clock-names = "xo",
+				      "sleep_clk";
 		};
 
 		mmcc: clock-controller@fd8c0000 {