diff mbox series

[5/8] drm/i915/guc: Update GuC messages in intel_guc_fw.c

Message ID 20230120164050.1765-6-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show
Series GuC oriented print macros | expand

Commit Message

Michal Wajdeczko Jan. 20, 2023, 4:40 p.m. UTC
Use new macros to have common prefix that also include GT#.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

Comments

John Harrison Jan. 23, 2023, 10:57 p.m. UTC | #1
On 1/20/2023 08:40, Michal Wajdeczko wrote:
> Use new macros to have common prefix that also include GT#.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 17 +++++++++--------
>   1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> index 5b86b2e286e0..3d2249bda368 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
> @@ -13,6 +13,7 @@
>   #include "gt/intel_gt_mcr.h"
>   #include "gt/intel_gt_regs.h"
>   #include "intel_guc_fw.h"
> +#include "intel_guc_print.h"
>   #include "i915_drv.h"
>   
>   static void guc_prepare_xfer(struct intel_gt *gt)
> @@ -103,8 +104,10 @@ static inline bool guc_ready(struct intel_uncore *uncore, u32 *status)
>   	return uk_val == INTEL_GUC_LOAD_STATUS_READY;
>   }
>   
> -static int guc_wait_ucode(struct intel_uncore *uncore)
> +static int guc_wait_ucode(struct intel_guc *guc)
>   {
> +	struct intel_gt *gt = guc_to_gt(guc);
> +	struct intel_uncore *uncore = gt->uncore;
>   	u32 status;
>   	int ret;
>   
> @@ -127,10 +130,8 @@ static int guc_wait_ucode(struct intel_uncore *uncore)
>   	 */
>   	ret = wait_for(guc_ready(uncore, &status), 200);
>   	if (ret) {
> -		struct drm_device *drm = &uncore->i915->drm;
> -
> -		drm_info(drm, "GuC load failed: status = 0x%08X\n", status);
> -		drm_info(drm, "GuC load failed: status: Reset = %d, "
> +		guc_info(guc, "load failed: status = 0x%08X\n", status);
> +		guc_info(guc, "load failed: status: Reset = %d, "
>   			"BootROM = 0x%02X, UKernel = 0x%02X, "
>   			"MIA = 0x%02X, Auth = 0x%02X\n",
>   			REG_FIELD_GET(GS_MIA_IN_RESET, status),
> @@ -140,12 +141,12 @@ static int guc_wait_ucode(struct intel_uncore *uncore)
>   			REG_FIELD_GET(GS_AUTH_STATUS_MASK, status));
>   
>   		if ((status & GS_BOOTROM_MASK) == GS_BOOTROM_RSA_FAILED) {
> -			drm_info(drm, "GuC firmware signature verification failed\n");
> +			guc_info(guc, "firmware signature verification failed\n");
>   			ret = -ENOEXEC;
>   		}
>   
>   		if (REG_FIELD_GET(GS_UKERNEL_MASK, status) == INTEL_GUC_LOAD_STATUS_EXCEPTION) {
> -			drm_info(drm, "GuC firmware exception. EIP: %#x\n",
> +			guc_info(guc, "firmware exception. EIP: %#x\n",
>   				 intel_uncore_read(uncore, SOFT_SCRATCH(13)));
>   			ret = -ENXIO;
>   		}
> @@ -194,7 +195,7 @@ int intel_guc_fw_upload(struct intel_guc *guc)
>   	if (ret)
>   		goto out;
>   
> -	ret = guc_wait_ucode(uncore);
> +	ret = guc_wait_ucode(guc);
>   	if (ret)
>   		goto out;
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 5b86b2e286e0..3d2249bda368 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -13,6 +13,7 @@ 
 #include "gt/intel_gt_mcr.h"
 #include "gt/intel_gt_regs.h"
 #include "intel_guc_fw.h"
+#include "intel_guc_print.h"
 #include "i915_drv.h"
 
 static void guc_prepare_xfer(struct intel_gt *gt)
@@ -103,8 +104,10 @@  static inline bool guc_ready(struct intel_uncore *uncore, u32 *status)
 	return uk_val == INTEL_GUC_LOAD_STATUS_READY;
 }
 
-static int guc_wait_ucode(struct intel_uncore *uncore)
+static int guc_wait_ucode(struct intel_guc *guc)
 {
+	struct intel_gt *gt = guc_to_gt(guc);
+	struct intel_uncore *uncore = gt->uncore;
 	u32 status;
 	int ret;
 
@@ -127,10 +130,8 @@  static int guc_wait_ucode(struct intel_uncore *uncore)
 	 */
 	ret = wait_for(guc_ready(uncore, &status), 200);
 	if (ret) {
-		struct drm_device *drm = &uncore->i915->drm;
-
-		drm_info(drm, "GuC load failed: status = 0x%08X\n", status);
-		drm_info(drm, "GuC load failed: status: Reset = %d, "
+		guc_info(guc, "load failed: status = 0x%08X\n", status);
+		guc_info(guc, "load failed: status: Reset = %d, "
 			"BootROM = 0x%02X, UKernel = 0x%02X, "
 			"MIA = 0x%02X, Auth = 0x%02X\n",
 			REG_FIELD_GET(GS_MIA_IN_RESET, status),
@@ -140,12 +141,12 @@  static int guc_wait_ucode(struct intel_uncore *uncore)
 			REG_FIELD_GET(GS_AUTH_STATUS_MASK, status));
 
 		if ((status & GS_BOOTROM_MASK) == GS_BOOTROM_RSA_FAILED) {
-			drm_info(drm, "GuC firmware signature verification failed\n");
+			guc_info(guc, "firmware signature verification failed\n");
 			ret = -ENOEXEC;
 		}
 
 		if (REG_FIELD_GET(GS_UKERNEL_MASK, status) == INTEL_GUC_LOAD_STATUS_EXCEPTION) {
-			drm_info(drm, "GuC firmware exception. EIP: %#x\n",
+			guc_info(guc, "firmware exception. EIP: %#x\n",
 				 intel_uncore_read(uncore, SOFT_SCRATCH(13)));
 			ret = -ENXIO;
 		}
@@ -194,7 +195,7 @@  int intel_guc_fw_upload(struct intel_guc *guc)
 	if (ret)
 		goto out;
 
-	ret = guc_wait_ucode(uncore);
+	ret = guc_wait_ucode(guc);
 	if (ret)
 		goto out;